Lines Matching +full:platform +full:- +full:specific

1 Andestech(nds32) AE3XX Platform
2 -----------------------------------------------------------------------------
3 The AE3XX prototype demonstrates the AE3XX example platform on the FPGA. It
7 - compatible = "andestech,ae3xx";
10 /dts-v1/;
13 	#address-cells = <1>;
14 	#size-cells = <1>;
15 	interrupt-parent = <&intc>;
18 Andestech(nds32) AG101P Platform
19 -----------------------------------------------------------------------------
20 AG101P is a generic SoC Platform IP that works with any of Andestech(nds32)
21 processors to provide a cost-effective and high performance solution for
24 logics to complete a SoC solution for a specific application. With
27 efficiently. The optional hardware development platform further provides real
28 system environment for early prototyping and software/hardware co-development.
34 /dts-v1/;
37 	#address-cells = <1>;
38 	#size-cells = <1>;
39 	interrupt-parent = <&intc>;