Lines Matching +full:fast +full:- +full:read
1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
4 $id: http://devicetree.org/schemas/mtd/jedec,spi-nor.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Rob Herring <robh@kernel.org>
13 - $ref: mtd.yaml#
14 - $ref: /schemas/spi/spi-peripheral-props.yaml#
19 - items:
20 - pattern: "^((((micron|spansion|st),)?\
33 - const: jedec,spi-nor
34 - items:
35 - enum:
36 - issi,is25lp016d
37 - micron,mt25qu02g
38 - mxicy,mx25r1635f
39 - mxicy,mx25u6435f
40 - mxicy,mx25v8035f
41 - spansion,s25sl12801
42 - spansion,s25fs512s
43 - const: jedec,spi-nor
44 - const: jedec,spi-nor
47 identified with the READ ID opcode (0x9F) do not deserve a specific
49 "jedec,spi-nor" compatible.
58 m25p,fast-read:
61 Use the "fast read" opcode to read data from the chip instead of the usual
62 "read" opcode. This opcode is not supported by all chips and support for
66 broken-flash-reset:
69 Some flash devices utilize stateful addressing modes (e.g., for 32-bit
78 no-wp:
84 strapped to LOW, the status register nonvolatile bits become read-only and
86 this hardware-protected mode is to drive WP# HIGH. If the WP# signal of the
88 pull-downs) then status register permanently becomes read-only as the SRWD bit
93 reset-gpios:
96 If "broken-flash-reset" is present then having this property does not
99 spi-cpol: true
100 spi-cpha: true
103 spi-cpol: [ spi-cpha ]
104 spi-cpha: [ spi-cpol ]
109 - |
110 #include <dt-bindings/gpio/gpio.h>
112 #address-cells = <1>;
113 #size-cells = <0>;
116 compatible = "spansion,m25p80", "jedec,spi-nor";
118 spi-max-frequency = <40000000>;
119 m25p,fast-read;
120 reset-gpios = <&gpio 12 GPIO_ACTIVE_LOW>;