Lines Matching +full:gxbb +full:- +full:clkc
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/mtd/amlogic,meson-nand.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Amlogic NAND Flash Controller (NFC) for GXBB/GXL/AXG family SoCs
10 - $ref: nand-controller.yaml
13 - liang.yang@amlogic.com
18 - amlogic,meson-gxl-nfc
19 - amlogic,meson-axg-nfc
24 reg-names:
26 - const: nfc
27 - const: emmc
35 clock-names:
37 - const: core
38 - const: device
41 "^nand@[0-7]$":
43 $ref: raw-nand-chip.yaml
49 nand-ecc-mode:
52 nand-ecc-step-size:
55 nand-ecc-strength:
59 meson-gxl-nfc 8, 16, 24, 30, 40, 50, 60
60 meson-axg-nfc 8
62 nand-rb:
70 nand-ecc-strength: [nand-ecc-step-size]
71 nand-ecc-step-size: [nand-ecc-strength]
75 - compatible
76 - reg
77 - interrupts
78 - clocks
79 - clock-names
84 - |
85 #include <dt-bindings/clock/axg-clkc.h>
86 #include <dt-bindings/interrupt-controller/arm-gic.h>
87 nand-controller@ffe07800 {
88 compatible = "amlogic,meson-axg-nfc";
90 reg-names = "nfc", "emmc";
92 clocks = <&clkc CLKID_SD_EMMC_C>, <&clkc CLKID_FCLK_DIV2>;
93 clock-names = "core", "device";
95 pinctrl-0 = <&nand_pins>;
96 pinctrl-names = "default";
98 #address-cells = <1>;
99 #size-cells = <0>;
103 nand-rb = <0>;