Lines Matching +full:r8a7740 +full:- +full:cpg +full:- +full:clocks
4 - compatible: should contain one or more of the following:
5 "renesas,sdhi-sh73a0" - SDHI IP on SH73A0 SoC
6 "renesas,sdhi-r7s72100" - SDHI IP on R7S72100 SoC
7 "renesas,sdhi-r7s9210" - SDHI IP on R7S9210 SoC
8 "renesas,sdhi-r8a73a4" - SDHI IP on R8A73A4 SoC
9 "renesas,sdhi-r8a7740" - SDHI IP on R8A7740 SoC
10 "renesas,sdhi-r8a7742" - SDHI IP on R8A7742 SoC
11 "renesas,sdhi-r8a7743" - SDHI IP on R8A7743 SoC
12 "renesas,sdhi-r8a7744" - SDHI IP on R8A7744 SoC
13 "renesas,sdhi-r8a7745" - SDHI IP on R8A7745 SoC
14 "renesas,sdhi-r8a774a1" - SDHI IP on R8A774A1 SoC
15 "renesas,sdhi-r8a774b1" - SDHI IP on R8A774B1 SoC
16 "renesas,sdhi-r8a774c0" - SDHI IP on R8A774C0 SoC
17 "renesas,sdhi-r8a77470" - SDHI IP on R8A77470 SoC
18 "renesas,sdhi-mmc-r8a77470" - SDHI/MMC IP on R8A77470 SoC
19 "renesas,sdhi-r8a7778" - SDHI IP on R8A7778 SoC
20 "renesas,sdhi-r8a7779" - SDHI IP on R8A7779 SoC
21 "renesas,sdhi-r8a7790" - SDHI IP on R8A7790 SoC
22 "renesas,sdhi-r8a7791" - SDHI IP on R8A7791 SoC
23 "renesas,sdhi-r8a7792" - SDHI IP on R8A7792 SoC
24 "renesas,sdhi-r8a7793" - SDHI IP on R8A7793 SoC
25 "renesas,sdhi-r8a7794" - SDHI IP on R8A7794 SoC
26 "renesas,sdhi-r8a7795" - SDHI IP on R8A7795 SoC
27 "renesas,sdhi-r8a7796" - SDHI IP on R8A77960 SoC
28 "renesas,sdhi-r8a77961" - SDHI IP on R8A77961 SoC
29 "renesas,sdhi-r8a77965" - SDHI IP on R8A77965 SoC
30 "renesas,sdhi-r8a77970" - SDHI IP on R8A77970 SoC
31 "renesas,sdhi-r8a77980" - SDHI IP on R8A77980 SoC
32 "renesas,sdhi-r8a77990" - SDHI IP on R8A77990 SoC
33 "renesas,sdhi-r8a77995" - SDHI IP on R8A77995 SoC
34 "renesas,sdhi-shmobile" - a generic sh-mobile SDHI controller
35 "renesas,rcar-gen1-sdhi" - a generic R-Car Gen1 SDHI controller
36 "renesas,rcar-gen2-sdhi" - a generic R-Car Gen2 and RZ/G1 SDHI
38 "renesas,rcar-gen3-sdhi" - a generic R-Car Gen3 or RZ/G2
43 the SoC-specific version corresponding to the platform
46 - clocks: Most controllers only have 1 clock source per channel. However, on
51 If 2 clocks are specified by the hardware, you must name them as
58 - pinctrl-names: should be "default", "state_uhs"
59 - pinctrl-0: should contain default/high speed pin ctrl
60 - pinctrl-1: should contain uhs mode pin ctrl
62 Example: R8A7790 (R-Car H2) SDHI controller nodes
65 compatible = "renesas,sdhi-r8a7790", "renesas,rcar-gen2-sdhi";
68 clocks = <&cpg CPG_MOD 314>;
71 dma-names = "tx", "rx", "tx", "rx";
72 max-frequency = <195000000>;
73 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
74 resets = <&cpg 314>;
78 compatible = "renesas,sdhi-r8a7790", "renesas,rcar-gen2-sdhi";
81 clocks = <&cpg CPG_MOD 313>;
84 dma-names = "tx", "rx", "tx", "rx";
85 max-frequency = <195000000>;
86 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
87 resets = <&cpg 313>;
91 compatible = "renesas,sdhi-r8a7790", "renesas,rcar-gen2-sdhi";
94 clocks = <&cpg CPG_MOD 312>;
97 dma-names = "tx", "rx", "tx", "rx";
98 max-frequency = <97500000>;
99 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
100 resets = <&cpg 312>;
104 compatible = "renesas,sdhi-r8a7790", "renesas,rcar-gen2-sdhi";
107 clocks = <&cpg CPG_MOD 311>;
110 dma-names = "tx", "rx", "tx", "rx";
111 max-frequency = <97500000>;
112 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
113 resets = <&cpg 311>;