Lines Matching +full:tegra210 +full:- +full:sdhci
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/mmc/nvidia,tegra20-sdhci.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jon Hunter <jonathanh@nvidia.com>
18 mmc-controller.yaml and the properties for the Tegra SDHCI controller.
23 - enum:
24 - nvidia,tegra20-sdhci
25 - nvidia,tegra30-sdhci
26 - nvidia,tegra114-sdhci
27 - nvidia,tegra124-sdhci
28 - nvidia,tegra210-sdhci
29 - nvidia,tegra186-sdhci
30 - nvidia,tegra194-sdhci
32 - items:
33 - const: nvidia,tegra132-sdhci
34 - const: nvidia,tegra124-sdhci
36 - items:
37 - enum:
38 - nvidia,tegra194-sdhci
39 - nvidia,tegra234-sdhci
40 - const: nvidia,tegra186-sdhci
48 assigned-clocks: true
49 assigned-clock-parents: true
50 assigned-clock-rates: true
56 clock-names:
62 - description: module reset
64 reset-names:
66 - const: sdhci
68 power-gpios:
74 - description: memory read client
75 - description: memory write client
77 interconnect-names:
79 - const: dma-mem # read
80 - const: write
85 operating-points-v2: true
87 power-domains:
89 - description: phandle to the core power domain
91 nvidia,default-tap:
93 non-tunable modes.
101 timing. Only SDMMC4 on Tegra210 and Tegra186 supports HS400.
104 nvidia,default-trim:
108 nvidia,dqs-trim:
112 nvidia,pad-autocal-pull-down-offset-1v8:
117 nvidia,pad-autocal-pull-down-offset-1v8-timeout:
122 nvidia,pad-autocal-pull-down-offset-3v3:
127 nvidia,pad-autocal-pull-down-offset-3v3-timeout:
132 nvidia,pad-autocal-pull-down-offset-sdr104:
136 nvidia,pad-autocal-pull-down-offset-hs400:
140 nvidia,pad-autocal-pull-up-offset-1v8:
145 nvidia,pad-autocal-pull-up-offset-1v8-timeout:
150 nvidia,pad-autocal-pull-up-offset-3v3:
162 nvidia,pad-autocal-pull-up-offset-3v3-timeout:
167 nvidia,pad-autocal-pull-up-offset-sdr104:
171 nvidia,pad-autocal-pull-up-offset-hs400:
175 nvidia,only-1-8v:
181 - compatible
182 - reg
183 - interrupts
184 - clocks
185 - resets
186 - reset-names
189 - $ref: mmc-controller.yaml
190 - if:
195 - nvidia,tegra20-sdhci
196 - nvidia,tegra30-sdhci
197 - nvidia,tegra114-sdhci
198 - nvidia,tegra124-sdhci
203 - description: module clock
208 - description: module clock
209 - description: timeout clock
211 clock-names:
213 - const: sdhci
214 - const: tmclk
216 - clock-names
218 - if:
222 const: nvidia,tegra210-sdhci
225 pinctrl-names:
227 - items:
228 - const: sdmmc-3v3
230 - const: sdmmc-1v8
232 - const: sdmmc-3v3-drv
233 description: pull-up/down configuration for 3.3 V
234 - const: sdmmc-1v8-drv
235 description: pull-up/down configuration for 1.8 V
236 - items:
237 - const: sdmmc-3v3-drv
238 description: pull-up/down configuration for 3.3 V
239 - const: sdmmc-1v8-drv
240 description: pull-up/down configuration for 1.8 V
241 - items:
242 - const: sdmmc-1v8-drv
243 description: pull-up/down configuration for 1.8 V
245 - clock-names
246 - if:
251 - nvidia,tegra186-sdhci
252 - nvidia,tegra194-sdhci
255 pinctrl-names:
257 - const: sdmmc-3v3
259 - const: sdmmc-1v8
262 - clock-names
267 - |
268 #include <dt-bindings/interrupt-controller/arm-gic.h>
271 compatible = "nvidia,tegra20-sdhci";
276 reset-names = "sdhci";
277 cd-gpios = <&gpio 69 0>; /* gpio PI5 */
278 wp-gpios = <&gpio 57 0>; /* gpio PH1 */
279 power-gpios = <&gpio 155 0>; /* gpio PT3 */
280 bus-width = <8>;
283 - |
284 #include <dt-bindings/clock/tegra210-car.h>
285 #include <dt-bindings/interrupt-controller/arm-gic.h>
288 compatible = "nvidia,tegra210-sdhci";
293 clock-names = "sdhci", "tmclk";
295 reset-names = "sdhci";
296 pinctrl-names = "sdmmc-3v3", "sdmmc-1v8",
297 "sdmmc-3v3-drv", "sdmmc-1v8-drv";
298 pinctrl-0 = <&sdmmc1_3v3>;
299 pinctrl-1 = <&sdmmc1_1v8>;
300 pinctrl-2 = <&sdmmc1_3v3_drv>;
301 pinctrl-3 = <&sdmmc1_1v8_drv>;
302 nvidia,pad-autocal-pull-up-offset-3v3 = <0x00>;
303 nvidia,pad-autocal-pull-down-offset-3v3 = <0x7d>;
304 nvidia,pad-autocal-pull-up-offset-1v8 = <0x7b>;
305 nvidia,pad-autocal-pull-down-offset-1v8 = <0x7b>;
306 nvidia,default-tap = <0x2>;
307 nvidia,default-trim = <0x4>;
308 assigned-clocks = <&tegra_car TEGRA210_CLK_SDMMC4>,
311 assigned-clock-parents = <&tegra_car TEGRA210_CLK_PLL_C4_OUT0>;
312 assigned-clock-rates = <200000000>, <1000000000>, <1000000000>;