Lines Matching +full:imx93 +full:- +full:clock
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/mmc/fsl-imx-esdhc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Shawn Guo <shawnguo@kernel.org>
13 - $ref: sdhci-common.yaml#
20 by mmc.txt and the properties used by the sdhci-esdhc-imx driver.
25 - enum:
26 - fsl,imx25-esdhc
27 - fsl,imx35-esdhc
28 - fsl,imx51-esdhc
29 - fsl,imx53-esdhc
30 - fsl,imx6q-usdhc
31 - fsl,imx6sl-usdhc
32 - fsl,imx6sx-usdhc
33 - fsl,imx7d-usdhc
34 - fsl,imx7ulp-usdhc
35 - fsl,imx8mm-usdhc
36 - fsl,imxrt1050-usdhc
37 - nxp,s32g2-usdhc
38 - items:
39 - const: fsl,imx50-esdhc
40 - const: fsl,imx53-esdhc
41 - items:
42 - enum:
43 - fsl,imx6sll-usdhc
44 - fsl,imx6ull-usdhc
45 - fsl,imx6ul-usdhc
46 - const: fsl,imx6sx-usdhc
47 - items:
48 - const: fsl,imx7d-usdhc
49 - const: fsl,imx6sl-usdhc
50 - items:
51 - enum:
52 - fsl,imx8mq-usdhc
53 - const: fsl,imx7d-usdhc
54 - items:
55 - enum:
56 - fsl,imx8mn-usdhc
57 - fsl,imx8mp-usdhc
58 - fsl,imx93-usdhc
59 - fsl,imx8ulp-usdhc
60 - const: fsl,imx8mm-usdhc
61 - items:
62 - enum:
63 - fsl,imx8dxl-usdhc
64 - fsl,imx8qm-usdhc
65 - const: fsl,imx8qxp-usdhc
66 - items:
67 - enum:
68 - fsl,imx8mm-usdhc
69 - fsl,imx8mn-usdhc
70 - fsl,imx8mp-usdhc
71 - fsl,imx8qm-usdhc
72 - fsl,imx8qxp-usdhc
73 - const: fsl,imx7d-usdhc
75 - items:
76 - enum:
77 - fsl,imx8mn-usdhc
78 - fsl,imx8mp-usdhc
79 - const: fsl,imx8mm-usdhc
80 - const: fsl,imx7d-usdhc
82 - items:
83 - enum:
84 - fsl,imx8dxl-usdhc
85 - fsl,imx8qm-usdhc
86 - const: fsl,imx8qxp-usdhc
87 - const: fsl,imx7d-usdhc
89 - items:
90 - enum:
91 - fsl,imxrt1170-usdhc
92 - const: fsl,imxrt1050-usdhc
100 fsl,wp-controller:
105 fsl,delay-line:
109 This is used to set the clock delay for DLL(Delay Line) on override mode
110 to select a proper data sampling window in case the clock quality is not good
115 voltage-ranges:
116 $ref: /schemas/types.yaml#/definitions/uint32-matrix
124 - description: value for minimum slot voltage
125 - description: value for maximum slot voltage
128 fsl,tuning-start-tap:
134 fsl,tuning-step:
144 fsl,strobe-dll-delay-target:
148 This delay target programming host controller loopback read clock, and this
149 property allows user to change the delay target for the strobe input read clock.
159 clock-names:
161 - const: ipg
162 - const: ahb
163 - const: per
165 power-domains:
168 pinctrl-names:
170 - minItems: 3
172 - const: default
173 - const: state_100mhz
174 - const: state_200mhz
175 - const: sleep
176 - minItems: 1
178 - const: default
179 - const: sleep
182 - compatible
183 - reg
184 - interrupts
189 - |
191 compatible = "fsl,imx51-esdhc";
194 fsl,wp-controller;
198 compatible = "fsl,imx51-esdhc";
201 cd-gpios = <&gpio1 6 0>; /* GPIO1_6 */
202 wp-gpios = <&gpio1 5 0>; /* GPIO1_5 */