Lines Matching +full:meson +full:- +full:gxbb +full:- +full:mmc
1 Amlogic SD / eMMC controller for S905/GXBB family SoCs
3 The MMC 5.1 compliant host controller on Amlogic provides the
7 the MMC core bindings, documented by mmc.txt.
10 - compatible : contains one of:
11 - "amlogic,meson-gx-mmc"
12 - "amlogic,meson-gxbb-mmc"
13 - "amlogic,meson-gxl-mmc"
14 - "amlogic,meson-gxm-mmc"
15 - "amlogic,meson-axg-mmc"
16 - clocks : A list of phandle + clock-specifier pairs for the clocks listed in clock-names.
17 - clock-names: Should contain the following:
18 "core" - Main peripheral bus clock
19 "clkin0" - Parent clock of internal mux
20 "clkin1" - Other parent clock of internal mux
22 clock rate requested by the MMC core.
23 - resets : phandle of the internal reset line
26 - amlogic,dram-access-quirk: set when controller's internal DMA engine cannot access the
31 sd_emmc_a: mmc@70000 {
32 compatible = "amlogic,meson-gxbb-mmc";
36 clock-names = "core", "clkin0", "clkin1";
37 pinctrl-0 = <&emmc_pins>;