Lines Matching +full:0 +full:x710700f8
40 "^pinctrl@[0-9a-f]+$":
44 "^gpio@[0-9a-f]+$":
52 "^mdio@[0-9a-f]+$":
60 "^ethernet-switch@[0-9a-f]+$":
81 #clock-cells = <0>;
87 #size-cells = <0>;
89 soc@0 {
92 reg = <0>;
99 #size-cells = <0>;
100 reg = <0x7107009c 0x24>;
102 sw_phy0: ethernet-phy@0 {
103 reg = <0x0>;
110 pinctrl-0 = <&miim1_pins>;
112 #size-cells = <0>;
113 reg = <0x710700c0 0x24>;
116 reg = <0x4>;
124 gpio-ranges = <&gpio 0 0 22>;
125 reg = <0x71070034 0x6c>;
141 #size-cells = <0>;
144 microchip,sgpio-port-ranges = <0 15>;
146 pinctrl-0 = <&sgpio_pins>;
147 reg = <0x710700f8 0x100>;
149 sgpio_in0: gpio@0 {
151 reg = <0>;