Lines Matching +full:lpc +full:- +full:io +full:- +full:reg
3 Google's ChromeOS EC is a Cortex-M device which talks to the AP and
6 The EC can be connect through various means (I2C, SPI, LPC, RPMSG) and the
8 its own driver which connects to the top level interface-agnostic EC driver.
9 Other Linux driver (such as cros-ec-keyb for the matrix keyboard) connect to
10 the top-level driver.
13 - compatible: "google,cros-ec-i2c"
14 - reg: I2C slave address
17 - compatible: "google,cros-ec-spi"
18 - reg: SPI chip select
21 - compatible: "google,cros-ec-rpmsg"
24 - google,cros-ec-spi-pre-delay: Some implementations of the EC need a little
28 - google,cros-ec-spi-msg-delay: Some implementations of the EC require some
36 Required properties (LPC):
37 - compatible: "google,cros-ec-lpc"
38 - reg: List of (IO address, size) pairs defining the interface uses
41 - google,has-vbc-nvram: Some implementations of the EC include a small
48 cros-ec@1e {
49 reg = <0x1e>;
50 compatible = "google,cros-ec-i2c";
52 interrupt-parent = <&wakeup_eint>;
53 wakeup-source;
61 compatible = "google,cros-ec-spi";
62 reg = <0x0>;
64 interrupt-parent = <&wakeup_eint>;
65 wakeup-source;
66 spi-max-frequency = <5000000>;
67 controller-data {
68 cs-gpio = <&gpf0 3 4 3 0>;
69 samsung,spi-cs;
70 samsung,spi-feedback-delay = <2>;
76 Example for LPC is not supplied as it is not yet implemented.