Lines Matching full:aspeed
2 Device tree bindings for the Aspeed Low Pin Count (LPC) Bus Controller
7 primary use case of the Aspeed LPC controller is as a slave on the bus
41 "aspeed,ast2400-lpc-v2", "simple-mfd", "syscon"
42 "aspeed,ast2500-lpc-v2", "simple-mfd", "syscon"
43 "aspeed,ast2600-lpc-v2", "simple-mfd", "syscon"
45 - reg: contains the physical address and length values of the Aspeed
56 compatible = "aspeed,ast2500-lpc-v2", "simple-mfd", "syscon";
64 compatible = "aspeed,ast2600-lpc-snoop";
82 "aspeed,ast2400-lpc-ctrl";
83 "aspeed,ast2500-lpc-ctrl";
84 "aspeed,ast2600-lpc-ctrl";
103 compatible = "aspeed,ast2500-lpc-ctrl";
113 The Aspeed LPC Host Controller configures the Low Pin Count (LPC) bus behaviour
115 in the "host" portion of the Aspeed LPC controller, which must be the parent of
121 "aspeed,ast2400-lhc";
122 "aspeed,ast2500-lhc";
123 "aspeed,ast2600-lhc";
131 compatible = "aspeed,ast2500-lhc";
138 The UARTs present in the ASPEED SoC can have their resets tied to the reset
144 "aspeed,ast2600-lpc-reset";
145 "aspeed,ast2500-lpc-reset";
146 "aspeed,ast2400-lpc-reset";
154 compatible = "aspeed,ast2500-lpc-reset";