Lines Matching +full:write +full:- +full:data

1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/memory-controllers/st,stm32-fmc2-ebi-props.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10   - Christophe Kerello <christophe.kerello@foss.st.com>
11   - Marek Vasut <marex@denx.de>
14   st,fmc2-ebi-cs-transaction-type:
25       8: Synchronous read synchronous write PSRAM.
26       9: Synchronous read asynchronous write PSRAM.
27       10: Synchronous read synchronous write NOR.
28       11: Synchronous read asynchronous write NOR.
33   st,fmc2-ebi-cs-cclk-enable:
40   st,fmc2-ebi-cs-mux-enable:
41     description: Address/Data multiplexed on databus (valid only with
42       NOR and PSRAM transactions type). By default, Address/Data
46   st,fmc2-ebi-cs-buswidth:
47     description: Data bus width
52   st,fmc2-ebi-cs-waitpol-high:
57   st,fmc2-ebi-cs-waitcfg-enable:
58     description: The NWAIT signal indicates wheither the data from the
61       active one data cycle before wait state.
64   st,fmc2-ebi-cs-wait-enable:
70   st,fmc2-ebi-cs-asyncwait-enable:
76   st,fmc2-ebi-cs-cpsize:
84   st,fmc2-ebi-cs-byte-lane-setup-ns:
88   st,fmc2-ebi-cs-address-setup-ns:
90       phase in nanoseconds used for asynchronous read/write transactions.
92   st,fmc2-ebi-cs-address-hold-ns:
94       phase in nanoseconds used for asynchronous multiplexed read/write
97   st,fmc2-ebi-cs-data-setup-ns:
98     description: This property defines the duration of the data setup phase
99       in nanoseconds used for asynchronous read/write transactions.
101   st,fmc2-ebi-cs-bus-turnaround-ns:
103       end of current read/write transaction and the next transaction.
105   st,fmc2-ebi-cs-data-hold-ns:
106     description: This property defines the duration of the data hold phase
107       in nanoseconds used for asynchronous read/write transactions.
109   st,fmc2-ebi-cs-clk-period-ns:
113   st,fmc2-ebi-cs-data-latency-ns:
114     description: This property defines the data latency before reading or
115       writing the first data in nanoseconds.
117   st,fmc2-ebi-cs-write-address-setup-ns:
119       phase in nanoseconds used for asynchronous write transactions.
121   st,fmc2-ebi-cs-write-address-hold-ns:
123       phase in nanoseconds used for asynchronous multiplexed write
126   st,fmc2-ebi-cs-write-data-setup-ns:
127     description: This property defines the duration of the data setup
128       phase in nanoseconds used for asynchronous write transactions.
130   st,fmc2-ebi-cs-write-bus-turnaround-ns:
132       write transaction and the next transaction in nanoseconds.
134   st,fmc2-ebi-cs-write-data-hold-ns:
135     description: This property defines the duration of the data hold phase
136       in nanoseconds used for asynchronous write transactions.
138   st,fmc2-ebi-cs-max-low-pulse-ns: