Lines Matching +full:scrubber +full:- +full:done

1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
4 $id: http://devicetree.org/schemas/memory-controllers/snps,dw-umctl2-ddrc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Synopsys DesignWare Universal Multi-Protocol Memory Controller
10   - Krzysztof Kozlowski <krzk@kernel.org>
11   - Michal Simek <michal.simek@amd.com>
17   16-bits or 32-bits or 64-bits wide.
20   controller. It has an optional SEC/DEC ECC support in 64- and 32-bits
26       - deprecated: true
28         const: snps,ddrc-3.80a
29       - description: Synopsys DW uMCTL2 DDR controller
30         const: snps,dw-umctl2-ddrc
31       - description: Xilinx ZynqMP DDR controller v2.40a
32         const: xlnx,zynqmp-ddrc-2.40a
36       DW uMCTL2 DDRC IP-core provides individual IRQ signal for each event":"
38       Scrubber-Done signal, DFI Parity/CRC Error. Some platforms may have the
44   interrupt-names:
48       - description: Common ECC CE/UE/Scrubber/DFI Errors IRQ
50           - const: ecc
51       - description: Individual ECC CE/UE/Scrubber/DFI Errors IRQs
60       A standard set of the clock sources contains CSRs bus clock, AXI-ports
61       reference clock, DDRC core clock, Scrubber standalone clock
66   clock-names:
78   reset-names:
85   - compatible
86   - reg
87   - interrupts
92   - |
93     #include <dt-bindings/interrupt-controller/arm-gic.h>
95     memory-controller@fd070000 {
96       compatible = "xlnx,zynqmp-ddrc-2.40a";
99       interrupt-parent = <&gic>;
101       interrupt-names = "ecc";
103   - |
104     #include <dt-bindings/interrupt-controller/irq.h>
106     memory-controller@3d400000 {
107       compatible = "snps,dw-umctl2-ddrc";
112       interrupt-names = "ecc_ce", "ecc_ue", "ecc_sbr", "dfi_e";
115       clock-names = "pclk", "aclk", "core", "sbr";