Lines Matching +full:pulse +full:- +full:width

1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/memory-controllers/renesas,rzg3e-xspi.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10   - Biju Das <biju.das.jz@bp.renesas.com>
14   the memory-mapping or the manual command mode.
19   -  "jedec,spi-nor";
22   - $ref: /schemas/spi/spi-controller.yaml#
27       - const: renesas,r9a09g047-xspi  # RZ/G3E
29       - items:
30           - enum:
31               - renesas,r9a09g056-xspi  # RZ/V2N
32               - renesas,r9a09g057-xspi  # RZ/V2H(P)
33           - const: renesas,r9a09g047-xspi
37       - description: xSPI registers
38       - description: direct mapping area
40   reg-names:
42       - const: regs
43       - const: dirmap
47       - description: Interrupt pulse signal by factors excluding errors
48       - description: Interrupt pulse signal by error factors
50   interrupt-names:
52       - const: pulse
53       - const: err_pulse
57       - description: AHB clock
58       - description: AXI clock
59       - description: SPI clock
60       - description: Double speed SPI clock
62   clock-names:
64       - const: ahb
65       - const: axi
66       - const: spi
67       - const: spix2
69   power-domains:
74       - description: Hardware reset
75       - description: AXI reset
77   reset-names:
79       - const: hresetn
80       - const: aresetn
82   renesas,xspi-cs-addr-sys:
89   "flash@[0-9a-f]+$":
96           const: jedec,spi-nor
99   - compatible
100   - reg
101   - reg-names
102   - interrupts
103   - interrupt-names
104   - clocks
105   - clock-names
106   - power-domains
107   - resets
108   - reset-names
109   - '#address-cells'
110   - '#size-cells'
115   - |
116     #include <dt-bindings/interrupt-controller/arm-gic.h>
117     #include <dt-bindings/clock/renesas,r9a09g047-cpg.h>
120         compatible = "renesas,r9a09g047-xspi";
122         reg-names = "regs", "dirmap";
125         interrupt-names = "pulse", "err_pulse";
128         clock-names = "ahb", "axi", "spi", "spix2";
129         power-domains = <&cpg>;
131         reset-names = "hresetn", "aresetn";
132         #address-cells = <1>;
133         #size-cells = <0>;
136           compatible = "jedec,spi-nor";
138           spi-max-frequency = <40000000>;
139           spi-tx-bus-width = <1>;
140           spi-rx-bus-width = <1>;