Lines Matching full:smi

1 SMI (Smart Multimedia Interface) Common
5 Mediatek SMI have two generations of HW architecture, here is the list
10 There's slight differences between the two SMI, for generation 2, the
12 for generation 1, the register is at smi ao base(smi always on register
13 base). Besides that, the smi async clock should be prepared and enabled for
14 SMI generation 1 to transform the smi clock into emi clock domain, but that is
15 not needed for SMI generation 2.
19 	"mediatek,mt2701-smi-common"
20 	"mediatek,mt2712-smi-common"
21 	"mediatek,mt6779-smi-common"
22 	"mediatek,mt7623-smi-common", "mediatek,mt2701-smi-common"
23 	"mediatek,mt8167-smi-common"
24 	"mediatek,mt8173-smi-common"
25 	"mediatek,mt8183-smi-common"
26 - reg : the register and size of the SMI block.
29 - clock-names : must contain 3 entries for generation 1 smi HW and 2 entries
30   for generation 2 smi HW as follows:
33   - "smi" : It's the clock for transfer data and command.
35   - "async" : asynchronous clock, it help transform the smi clock into the emi
36 	      clock domain, this clock is only needed by generation 1 smi HW.
37   and these 2 option clocks for generation 2 smi HW:
43 	smi_common: smi@14022000 {
44 		compatible = "mediatek,mt8173-smi-common";
49 		clock-names = "apb", "smi";