Lines Matching +full:ref +full:- +full:select

1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/memory-controllers/intel,ixp4xx-expansion-peripheral-props.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
11   memory-mapped expansion bus on the Intel IXP4xx family of system on chips,
15   - Linus Walleij <linus.walleij@linaro.org>
18   intel,ixp4xx-eb-t1:
20     $ref: /schemas/types.yaml#/definitions/uint32
23   intel,ixp4xx-eb-t2:
24     description: Setup chip select timing, extend setup phase with n cycles.
25     $ref: /schemas/types.yaml#/definitions/uint32
28   intel,ixp4xx-eb-t3:
30     $ref: /schemas/types.yaml#/definitions/uint32
33   intel,ixp4xx-eb-t4:
35     $ref: /schemas/types.yaml#/definitions/uint32
38   intel,ixp4xx-eb-t5:
40     $ref: /schemas/types.yaml#/definitions/uint32
43   intel,ixp4xx-eb-cycle-type:
45       chip select. 0 = Intel cycles, 1 = Motorola cycles, 2 = HPI cycles.
46     $ref: /schemas/types.yaml#/definitions/uint32
49   intel,ixp4xx-eb-byte-access-on-halfword:
51     $ref: /schemas/types.yaml#/definitions/uint32
54   intel,ixp4xx-eb-hpi-hrdy-pol-high:
56     $ref: /schemas/types.yaml#/definitions/uint32
59   intel,ixp4xx-eb-mux-address-and-data:
61     $ref: /schemas/types.yaml#/definitions/uint32
64   intel,ixp4xx-eb-ahb-split-transfers:
66     $ref: /schemas/types.yaml#/definitions/uint32
69   intel,ixp4xx-eb-write-enable:
71     $ref: /schemas/types.yaml#/definitions/uint32
74   intel,ixp4xx-eb-byte-access:
77     $ref: /schemas/types.yaml#/definitions/uint32