Lines Matching +full:mt8183 +full:- +full:mdp3 +full:- +full:rsz
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/media/mediatek,mdp3-rdma.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Matthias Brugger <matthias.bgg@gmail.com>
11 - Moudy Ho <moudy.ho@mediatek.com>
24 - enum:
25 - mediatek,mt8183-mdp3-rdma
26 - mediatek,mt8195-mdp3-rdma
27 - mediatek,mt8195-vdo1-rdma
28 - items:
29 - const: mediatek,mt8188-vdo1-rdma
30 - const: mediatek,mt8195-vdo1-rdma
35 mediatek,gce-client-reg:
36 $ref: /schemas/types.yaml#/definitions/phandle-array
39 - description: phandle of GCE
40 - description: GCE subsys id
41 - description: register offset
42 - description: register size
45 a client defined in the header include/dt-bindings/gce/<chip>-gce.h.
47 mediatek,gce-events:
51 include/dt-bindings/gce/<chip>-gce.h of each chips.
52 $ref: /schemas/types.yaml#/definitions/uint32-array
58 and stopping the MDP3, for sending frame data locations to the MDP3's
59 VPU and to install Inter-Processor Interrupt handlers to control
62 power-domains:
67 - description: RDMA clock
68 - description: RSZ clock
76 - description: used for 1st data pipe from RDMA
77 - description: used for 2nd data pipe from RDMA
78 - description: used for 3rd data pipe from RDMA
79 - description: used for 4th data pipe from RDMA
80 - description: used for the data pipe from SPLIT
86 '#dma-cells':
90 - compatible
91 - reg
92 - mediatek,gce-client-reg
93 - power-domains
94 - clocks
95 - iommus
96 - '#dma-cells'
99 - if:
103 const: mediatek,mt8183-mdp3-rdma
114 - mboxes
115 - mediatek,gce-events
117 - if:
121 const: mediatek,mt8195-mdp3-rdma
132 - mediatek,gce-events
134 - if:
138 const: mediatek,mt8195-vdo1-rdma
148 - |
149 #include <dt-bindings/clock/mt8183-clk.h>
150 #include <dt-bindings/gce/mt8183-gce.h>
151 #include <dt-bindings/power/mt8183-power.h>
152 #include <dt-bindings/memory/mt8183-larb-port.h>
154 dma-controller@14001000 {
155 compatible = "mediatek,mt8183-mdp3-rdma";
157 mediatek,gce-client-reg = <&gce SUBSYS_1400XXXX 0x1000 0x1000>;
158 mediatek,gce-events = <CMDQ_EVENT_MDP_RDMA0_SOF>,
160 power-domains = <&spm MT8183_POWER_DOMAIN_DISP>;
166 #dma-cells = <1>;