Lines Matching +full:image +full:- +full:processor

1 Exynos4x12 SoC series Imaging Subsystem (FIMC-IS)
3 The FIMC-IS is a subsystem for processing image signal from an image sensor.
4 The Exynos4x12 SoC series FIMC-IS V1.5 comprises of a dedicated ARM Cortex-A5
5 processor, ISP, DRC and FD IP blocks and peripheral devices such as UART, I2C
8 fimc-is node
9 ------------
12 - compatible	: should be "samsung,exynos4212-fimc-is" for Exynos4212 and
14 - reg		: physical base address and length of the registers set;
15 - interrupts	: must contain two FIMC-IS interrupts, in order: ISP0, ISP1;
16 - clocks	: list of clock specifiers, corresponding to entries in
17 		  clock-names property;
18 - clock-names	: must contain "ppmuispx", "ppmuispx", "lite0", "lite1"
25 -----------
28  - reg : must contain PMU physical base address and size of the register set.
30 The following are the FIMC-IS peripheral device nodes and can be specified
31 either standalone or as the fimc-is node child nodes.
33 i2c-isp (ISP I2C bus controller) nodes
34 ------------------------------------------
38 - compatible	: should be "samsung,exynos4212-i2c-isp" for Exynos4212 and
40 - reg		: physical base address and length of the registers set;
41 - clocks	: must contain gate clock specifier for this controller;
42 - clock-names	: must contain "i2c_isp" entry.
45 according to the pinctrl bindings defined in ../pinctrl/pinctrl-bindings.txt.
47 Device tree nodes of the image sensors' controlled directly by the FIMC-IS
49 The data link of these image sensors must be specified using the common video
50 interfaces bindings, defined in video-interfaces.txt.