Lines Matching +full:dt +full:- +full:binding
6 ARM Short-Descriptor translation table format for address translation.
14 +--------+
16 gals0-rx gals1-rx (Global Async Local Sync rx)
19 gals0-tx gals1-tx (Global Async Local Sync tx)
21 +--------+
25 +----------------+-------
27 | gals-rx There may be GALS in some larbs.
30 | gals-tx
36 +-----+-----+ +----+----+
53 smi-common and m4u, and additional GALS module between smi-larb and
54 smi-common. GALS can been seen as a "asynchronous fifo" which could help
58 - compatible : must be one of the following string:
59 "mediatek,mt2701-m4u" for mt2701 which uses generation one m4u HW.
60 "mediatek,mt2712-m4u" for mt2712 which uses generation two m4u HW.
61 "mediatek,mt6779-m4u" for mt6779 which uses generation two m4u HW.
62 "mediatek,mt7623-m4u", "mediatek,mt2701-m4u" for mt7623 which uses
64 "mediatek,mt8167-m4u" for mt8167 which uses generation two m4u HW.
65 "mediatek,mt8173-m4u" for mt8173 which uses generation two m4u HW.
66 "mediatek,mt8183-m4u" for mt8183 which uses generation two m4u HW.
67 - reg : m4u register base and size.
68 - interrupts : the interrupt of m4u.
69 - clocks : must contain one entry for each clock-names.
70 - clock-names : Only 1 optional clock:
71 - "bclk": the block clock of m4u.
73 - mt2701, mt2712, mt7623 and mt8173.
76 - mediatek,larbs : List of phandle to the local arbiters in the current Socs.
77 Refer to bindings/memory-controllers/mediatek,smi-larb.txt. It must sort
79 - iommu-cells : must be 1. This is the mtk_m4u_id according to the HW.
81 dt-binding/memory/mt2701-larb-port.h for mt2701, mt7623
82 dt-binding/memory/mt2712-larb-port.h for mt2712,
83 dt-binding/memory/mt6779-larb-port.h for mt6779,
84 dt-binding/memory/mt8167-larb-port.h for mt8167,
85 dt-binding/memory/mt8173-larb-port.h for mt8173, and
86 dt-binding/memory/mt8183-larb-port.h for mt8183.
90 compatible = "mediatek,mt8173-m4u";
94 clock-names = "bclk";
96 #iommu-cells = <1>;
101 compatible = "mediatek,mt8173-disp";