Lines Matching +full:level +full:- +full:triggered
6 to be driven per N output. An Interrupt Router can either handle edge triggered
7 or level triggered interrupts and that is fixed in hardware.
10 +----------------------+
12 +-------+ | +------+ +-----+ |
13 | GPIO |----------->| | irq0 | | 0 | | Host IRQ
14 +-------+ | +------+ +-----+ | controller
15 | . . | +-------+
16 +-------+ | . . |----->| IRQ |
17 | INTA |----------->| . . | +-------+
18 +-------+ | . +-----+ |
19 | +------+ | N | |
20 | | irqM | +-----+ |
21 | +------+ |
23 +----------------------+
39 ----------------------------
41 - compatible: Must be "ti,sci-intr".
42 - ti,intr-trigger-type: Should be one of the following:
43 1: If intr supports edge triggered interrupts.
44 4: If intr supports level triggered interrupts.
45 - interrupt-controller: Identifies the node as an interrupt controller
46 - #interrupt-cells: Specifies the number of cells needed to encode an
51 - ti,sci: Phandle to TI-SCI compatible System controller node.
52 - ti,sci-dst-id: TISCI device ID of the destination IRQ controller.
53 - ti,sci-rm-range-girq: Array of TISCI subtype ids representing the host irqs
61 --------
65 main_intr: interrupt-controller0 {
66 compatible = "ti,sci-intr";
67 ti,intr-trigger-type = <1>;
68 interrupt-controller;
69 interrupt-parent = <&gic500>;
70 #interrupt-cells = <2>;
72 ti,sci-dst-id = <56>;
73 ti,sci-rm-range-girq = <0x1>;
78 interrupt-parent = <&main_intr>;