Lines Matching +full:sci +full:- +full:inta
1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/interrupt-controller/ti,sci-inta.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Lokesh Vutla <lokeshvutla@ti.com>
13 - $ref: /schemas/arm/keystone/ti,k3-sci-common.yaml#
16 The Interrupt Aggregator (INTA) provides a centralized machine
22 +-----------------------------------------+
24 | +--------------+ +------------+ |
25 m ------>| | vint | bit | | 0 |.....|63| vint0 |
26 . | +--------------+ +------------+ | +------+
28 Globalevents ------>| . . |----->| IRQ |
30 . | . . | +------+
31 n ------>| +--------------+ +------------+ |
33 | +--------------+ +------------+ |
36 | +--------------+ |
37 Unmapped events ---->| | umapidx |-------------------------> Globalevents
38 | +--------------+ |
40 +-----------------------------------------+
55 const: ti,sci-inta
60 interrupt-controller: true
62 '#interrupt-cells':
65 msi-controller: true
67 ti,interrupt-ranges:
68 $ref: /schemas/types.yaml#/definitions/uint32-matrix
70 Interrupt ranges that converts the INTA output hw irq numbers
74 - description: |
75 "output_irq" specifies the base for inta output irq
76 - description: |
78 - description: |
81 ti,unmapped-event-sources:
82 $ref: /schemas/types.yaml#/definitions/phandle-array
88 power-domains:
92 - compatible
93 - reg
94 - interrupt-controller
95 - msi-controller
96 - ti,sci
97 - ti,sci-dev-id
98 - ti,interrupt-ranges
103 - |
105 #address-cells = <2>;
106 #size-cells = <2>;
108 main_udmass_inta: msi-controller@33d00000 {
109 compatible = "ti,sci-inta";
111 interrupt-controller;
112 msi-controller;
113 interrupt-parent = <&main_navss_intr>;
114 ti,sci = <&dmsc>;
115 ti,sci-dev-id = <179>;
116 ti,interrupt-ranges = <0 0 256>;