Lines Matching +full:ti +full:- +full:pruss
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/interrupt-controller/ti,pruss-intc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: TI PRU-ICSS Local Interrupt Controller
10 - Suman Anna <s-anna@ti.com>
13 Each PRU-ICSS has a single interrupt controller instance that is common
17 various other PRUSS internal and external peripherals. The first 2 output
20 including the MPU and/or other PRUSS instances, DSPs or devices.
22 The property "ti,irqs-reserved" is used for denoting the connection
24 defined, it implies that all the PRUSS INTC output interrupts 2 through 9
30 through 19) are connected to new sub-modules within the ICSSG instances.
32 This interrupt-controller node should be defined as a child node of the
33 corresponding PRUSS node. The node should be named "interrupt-controller".
37 pattern: "^interrupt-controller@[0-9a-f]+$"
41 - ti,pruss-intc
42 - ti,icssg-intc
44 Use "ti,pruss-intc" for OMAP-L13x/AM18x/DA850 SoCs,
49 Use "ti,icssg-intc" for K3 AM65x, J721E and AM64x family of SoCs
62 interrupt-names:
66 pattern: host_intr[0-7]
72 interrupt-controller: true
74 "#interrupt-cells":
81 interrupts through 2 levels of many-to-one mapping i.e. events to channel
85 ti,irqs-reserved:
88 Bitmask of host interrupts between 0 and 7 (corresponding to PRUSS INTC
93 Eg: - AM437x and 66AK2G SoCs do not have "host_intr5" interrupt
95 - AM65x and J721E SoCs have "host_intr5", "host_intr6" and
98 - AM64x SoCs have all the 8 host interrupts connected to various
102 - compatible
103 - reg
104 - interrupts
105 - interrupt-names
106 - interrupt-controller
107 - "#interrupt-cells"
112 - |
113 /* AM33xx PRU-ICSS */
114 pruss: pruss@0 {
115 compatible = "ti,am3356-pruss";
117 #address-cells = <1>;
118 #size-cells = <1>;
121 pruss_intc: interrupt-controller@20000 {
122 compatible = "ti,pruss-intc";
125 interrupt-names = "host_intr0", "host_intr1",
129 interrupt-controller;
130 #interrupt-cells = <3>;
134 - |
136 /* AM4376 PRU-ICSS */
137 #include <dt-bindings/interrupt-controller/arm-gic.h>
138 pruss@0 {
139 compatible = "ti,am4376-pruss1";
141 #address-cells = <1>;
142 #size-cells = <1>;
145 interrupt-controller@20000 {
146 compatible = "ti,pruss-intc";
148 interrupt-controller;
149 #interrupt-cells = <3>;
157 interrupt-names = "host_intr0", "host_intr1",
161 ti,irqs-reserved = /bits/ 8 <0x20>; /* BIT(5) */