Lines Matching +full:interrupt +full:- +full:controller

1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/interrupt-controller/snps,dw-apb-ictl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Synopsys DesignWare APB interrupt controller
10   - Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
11   - Zhen Lei <thunder.leizhen@huawei.com>
14   Synopsys DesignWare provides interrupt controller IP for APB known as
15   dw_apb_ictl. The IP is used as secondary interrupt controller in some SoCs
17   interrupt controller in some SoCs, e.g. Hisilicon SD5203.
21     const: snps,dw-apb-ictl
26   interrupt-controller: true
28   '#interrupt-cells':
34       Interrupt input connected to the primary interrupt controller when used
35       as a secondary controller. The interrupt specifier maps to bits in the
36       low and high interrupt registers (0⇒bit 0 low, 1⇒bit 1 low, 32⇒bit 0 high,
40   - compatible
41   - reg
42   - interrupt-controller
43   - '#interrupt-cells'
48   - |
49     #include <dt-bindings/interrupt-controller/arm-gic.h>
51     interrupt-controller@3000 {
52         compatible = "snps,dw-apb-ictl";
54         interrupt-controller;
55         #interrupt-cells = <1>;
58   - |
59     interrupt-controller@10130000 {
60         compatible = "snps,dw-apb-ictl";
62         interrupt-controller;
63         #interrupt-cells = <1>;