Lines Matching +full:wired +full:- +full:interrupt

1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/interrupt-controller/mti,cpu-interrupt-controller.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: MIPS CPU Interrupt Controller
13    With the irq_domain in place we can describe how the 8 IRQs are wired to the
14    platforms internal interrupt controller cascade.
17   - Thomas Bogendoerfer <tsbogend@alpha.franken.de>
21     const: mti,cpu-interrupt-controller
23   '#interrupt-cells':
26   '#address-cells':
29   interrupt-controller: true
34   - compatible
35   - '#interrupt-cells'
36   - '#address-cells'
37   - interrupt-controller
40   - |
41     interrupt-controller {
42       compatible = "mti,cpu-interrupt-controller";
43       #address-cells = <0>;
44       #interrupt-cells = <1>;
45       interrupt-controller;