Lines Matching +full:t6000 +full:- +full:aic
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/interrupt-controller/apple,aic2.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Hector Martin <marcan@marcan.st>
18 - Level-triggered hardware IRQs wired to SoC blocks
19 - Single mask bit per IRQ
20 - Automatic masking on event delivery (auto-ack)
21 - Software triggering (ORed with hw line)
22 - Automatic prioritization (single event/ack register per CPU, lower IRQs =
24 - Automatic masking on ack
25 - Support for multiple dies
27 This device also represents the FIQ interrupt sources on platforms using AIC,
29 FIQ-based Fast IPIs.
34 - enum:
35 - apple,t8112-aic
36 - apple,t6000-aic
37 - const: apple,aic2
39 interrupt-controller: true
41 '#interrupt-cells':
46 - 0: Hardware IRQ
47 - 1: FIQ
49 The 2nd cell contains the die ID (only present on apple,t6000-aic).
52 - HW IRQs: interrupt number
53 - FIQs:
54 - 0: physical HV timer
55 - 1: virtual HV timer
56 - 2: physical guest timer
57 - 3: virtual guest timer
64 - description: Address and size of the main AIC2 registers.
65 - description: Address and size of the AIC2 Event register.
67 reg-names:
69 - const: core
70 - const: event
72 power-domains:
80 containing a set of sub-nodes, one per FIQ with a non-default
83 "^.+-affinity$":
87 apple,fiq-index:
95 $ref: /schemas/types.yaml#/definitions/phandle-array
101 - apple,fiq-index
102 - cpus
105 - compatible
106 - '#interrupt-cells'
107 - interrupt-controller
108 - reg
109 - reg-names
114 - $ref: /schemas/interrupt-controller.yaml#
115 - if:
119 const: apple,t8112-aic
122 '#interrupt-cells':
126 '#interrupt-cells':
130 - |
132 #address-cells = <2>;
133 #size-cells = <2>;
135 aic: interrupt-controller@28e100000 {
136 compatible = "apple,t6000-aic", "apple,aic2";
137 #interrupt-cells = <4>;
138 interrupt-controller;
141 reg-names = "core", "event";