Lines Matching +full:negative +full:- +full:phase

1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10   - Antoniu Miclaus <antoniu.miclaus@analog.com>
21       - adi,admv1014
26   spi-max-frequency:
32   clock-names:
34       - const: lo_in
38   vcm-supply:
40       Common-mode voltage regulator.
42   vcc-if-bb-supply:
46   vcc-vga-supply:
50   vcc-vva-supply:
54   vcc-lna-3p3-supply:
58   vcc-lna-1p5-supply:
62   vcc-bg-supply:
66   vcc-quad-supply:
70   vcc-mixer-supply:
74   adi,input-mode:
77       iq - in-phase quadrature (I/Q) input
78       if - complex intermediate frequency (IF) input
81   adi,detector-enable:
87   adi,p1db-compensation-enable:
92   adi,quad-se-mode:
94       Switch the LO path from differential to single-ended operation.
95       se-neg - Single-Ended Mode, Negative Side Disabled.
96       se-pos - Single-Ended Mode, Positive Side Disabled.
97       diff - Differential Mode.
98     enum: [se-neg, se-pos, diff]
101   - compatible
102   - reg
103   - clocks
104   - clock-names
105   - vcm-supply
106   - vcc-if-bb-supply
107   - vcc-vga-supply
108   - vcc-vva-supply
109   - vcc-lna-3p3-supply
110   - vcc-lna-1p5-supply
111   - vcc-bg-supply
112   - vcc-quad-supply
113   - vcc-mixer-supply
116   - $ref: /schemas/spi/spi-peripheral-props.yaml#
121   - |
123       #address-cells = <1>;
124       #size-cells = <0>;
128         spi-max-frequency = <1000000>;
130         clock-names = "lo_in";
131         vcm-supply = <&vcm>;
132         vcc-if-bb-supply = <&vcc_if_bb>;
133         vcc-vga-supply = <&vcc_vga>;
134         vcc-vva-supply = <&vcc_vva>;
135         vcc-lna-3p3-supply = <&vcc_lna_3p3>;
136         vcc-lna-1p5-supply = <&vcc_lna_1p5>;
137         vcc-bg-supply = <&vcc_bg>;
138         vcc-quad-supply = <&vcc_quad>;
139         vcc-mixer-supply = <&vcc_mixer>;
140         adi,quad-se-mode = "diff";
141         adi,detector-enable;
142         adi,p1db-compensation-enable;