Lines Matching +full:channel +full:- +full:0
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/iio/adc/st,stm32-dfsdm-adc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Fabrice Gasnier <fabrice.gasnier@foss.st.com>
11 - Olivier Moysan <olivier.moysan@foss.st.com>
14 STM32 DFSDM ADC is a sigma delta analog-to-digital converter dedicated to
17 - Sigma delta modulators (motor control, metering...)
18 - PDM microphones (audio digital microphone)
28 - st,stm32h7-dfsdm
29 - st,stm32mp1-dfsdm
36 - description:
39 - description: audio clock can be used as an alternate to feed CLKOUT.
42 clock-names:
44 - const: dfsdm
45 - const: audio
48 "#address-cells":
51 "#size-cells":
52 const: 0
54 spi-max-frequency:
63 - compatible
64 - reg
65 - clocks
66 - clock-names
67 - "#address-cells"
68 - "#size-cells"
73 "^filter@[0-9]+$":
81 - st,stm32-dfsdm-adc
82 - st,stm32-dfsdm-dmic
91 st,adc-channels:
93 List of single-ended channels muxed for this ADC.
95 - For st,stm32-dfsdm-adc: up to 8 channels numbered from 0 to 7.
96 - For st,stm32-dfsdm-dmic: 1 channel numbered from 0 to 7.
97 $ref: /schemas/types.yaml#/definitions/uint32-array
99 minimum: 0
102 st,adc-channel-names:
103 description: List of single-ended channel names.
105 st,filter-order:
107 SinC filter order from 0 to 5.
108 - 0: FastSinC
109 - [1-5]: order 1 to 5.
114 "#io-channel-cells":
117 st,adc-channel-types:
119 Single-ended channel input type.
120 - "SPI_R": SPI with data on rising edge (default)
121 - "SPI_F": SPI with data on falling edge
122 - "MANCH_R": manchester codec, rising edge = logic 0, falling edge = logic 1
123 - "MANCH_F": manchester codec, rising edge = logic 1, falling edge = logic 0
126 $ref: /schemas/types.yaml#/definitions/non-unique-string-array
128 st,adc-channel-clk-src:
131 - "CLKIN": external SPI clock (CLKIN x)
132 - "CLKOUT": internal SPI clock (CLKOUT) (default)
133 - "CLKOUT_F": internal SPI clock divided by 2 (falling edge).
134 - "CLKOUT_R": internal SPI clock divided by 2 (rising edge).
137 $ref: /schemas/types.yaml#/definitions/non-unique-string-array
139 st,adc-alt-channel:
143 If not set, channel n is connected to SPI input n.
144 If set, channel n is connected to SPI input n + 1.
147 st,filter0-sync:
149 Set to 1 to synchronize with DFSDM filter instance 0.
156 dma-names:
158 - const: rx
161 - compatible
162 - reg
163 - interrupts
164 - st,adc-channels
165 - st,adc-channel-names
166 - st,filter-order
167 - "#io-channel-cells"
170 - if:
174 const: st,stm32-dfsdm-adc
178 st,adc-channels:
182 st,adc-channel-names:
186 st,adc-channel-types:
190 st,adc-channel-clk-src:
194 io-channels:
197 modulator or internal ADC output to DFSDM channel.
200 - io-channels
202 - if:
206 const: st,stm32-dfsdm-dmic
210 st,adc-channels:
213 st,adc-channel-names:
216 st,adc-channel-types:
219 st,adc-channel-clk-src:
223 - dmas
224 - dma-names
227 "^dfsdm-dai+$":
235 - st,stm32h7-dfsdm-dai
237 "#sound-dai-cells":
238 const: 0
240 io-channels:
243 modulator or internal ADC output to DFSDM channel.
246 - compatible
247 - "#sound-dai-cells"
248 - io-channels
251 - if:
255 const: st,stm32h7-dfsdm
259 "^filter@[0-9]+$":
263 minimum: 0
266 - if:
270 const: st,stm32mp1-dfsdm
274 "^filter@[0-9]+$":
278 minimum: 0
282 - |
283 #include <dt-bindings/interrupt-controller/arm-gic.h>
284 #include <dt-bindings/clock/stm32mp1-clks.h>
286 compatible = "st,stm32mp1-dfsdm";
287 reg = <0x4400d000 0x800>;
289 clock-names = "dfsdm", "audio";
290 #address-cells = <1>;
291 #size-cells = <0>;
293 dfsdm0: filter@0 {
294 compatible = "st,stm32-dfsdm-dmic";
295 reg = <0>;
297 dmas = <&dmamux1 101 0x400 0x01>;
298 dma-names = "rx";
299 #io-channel-cells = <1>;
300 st,adc-channels = <1>;
301 st,adc-channel-names = "dmic0";
302 st,adc-channel-types = "SPI_R";
303 st,adc-channel-clk-src = "CLKOUT";
304 st,filter-order = <5>;
306 asoc_pdm0: dfsdm-dai {
307 compatible = "st,stm32h7-dfsdm-dai";
308 #sound-dai-cells = <0>;
309 io-channels = <&dfsdm0 0>;
314 compatible = "st,stm32-dfsdm-adc";
317 dmas = <&dmamux1 102 0x400 0x01>;
318 dma-names = "rx";
319 #io-channel-cells = <1>;
320 st,adc-channels = <2 3>;
321 st,adc-channel-names = "in2", "in3";
322 st,adc-channel-types = "SPI_R", "SPI_R";
323 st,adc-channel-clk-src = "CLKOUT_F", "CLKOUT_F";
324 io-channels = <&sd_adc2 &sd_adc3>;
325 st,filter-order = <1>;