Lines Matching +full:high +full:- +full:resolution
1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/iio/adc/st,stm32-adc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 STM32 ADC is a successive approximation analog-to-digital converter.
13 stored in a left-aligned or right-aligned 32-bit data register.
17 voltage goes beyond the user-defined, higher or lower thresholds.
22 - Fabrice Gasnier <fabrice.gasnier@foss.st.com>
27 - st,stm32f4-adc-core
28 - st,stm32h7-adc-core
29 - st,stm32mp1-adc-core
30 - st,stm32mp13-adc-core
38 - stm32f4 and stm32h7 share a common ADC interrupt line.
39 - stm32mp1 has two separate interrupt lines, one for each ADC within
41 - stm32mp13 has an interrupt line per ADC block.
50 - "adc" clock: for the analog circuitry, common to all ADCs.
53 - "bus" clock: for registers access, common to all ADCs.
57 clock-names: true
59 st,max-clk-rate-hz:
63 vdda-supply:
66 vref-supply:
69 booster-supply:
74 vdd-supply:
83 $ref: /schemas/types.yaml#/definitions/phandle-array
85 interrupt-controller: true
87 '#interrupt-cells':
90 '#address-cells':
93 '#size-cells':
97 - if:
101 const: st,stm32f4-adc-core
108 clock-names:
113 - description: interrupt line common for all ADCs
115 st,max-clk-rate-hz:
120 booster-supply: false
122 vdd-supply: false
126 - if:
130 const: st,stm32h7-adc-core
138 clock-names:
140 - const: bus
141 - const: adc
146 - description: interrupt line common for all ADCs
148 st,max-clk-rate-hz:
153 vdd-supply: false
157 - if:
161 const: st,stm32mp1-adc-core
169 clock-names:
171 - const: bus
172 - const: adc
177 - description: interrupt line for ADC1
178 - description: interrupt line for ADC2
180 st,max-clk-rate-hz:
185 - if:
189 const: st,stm32mp13-adc-core
197 clock-names:
199 - const: bus
200 - const: adc
205 - description: ADC interrupt line
207 st,max-clk-rate-hz:
215 - compatible
216 - reg
217 - interrupts
218 - clocks
219 - clock-names
220 - vdda-supply
221 - vref-supply
222 - interrupt-controller
223 - '#interrupt-cells'
224 - '#address-cells'
225 - '#size-cells'
228 "^adc@[0-9]+$":
237 - st,stm32f4-adc
238 - st,stm32h7-adc
239 - st,stm32mp1-adc
240 - st,stm32mp13-adc
245 - 0x0: ADC1
246 - 0x100: ADC2
247 - 0x200: ADC3 (stm32f4 only)
250 '#io-channel-cells':
253 '#address-cells':
256 '#size-cells':
262 - 0 for adc@0 (single adc for stm32mp13)
263 - 1 for adc@100
264 - 2 for adc@200 (stm32f4 only)
277 dma-names:
280 assigned-resolution-bits:
282 Resolution (bits) to use for conversions:
283 - can be 6, 8, 10 or 12 on stm32f4 and stm32mp13
284 - can be 8, 10, 12, 14 or 16 on stm32h7 and stm32mp1
286 st,adc-channels:
288 List of single-ended channels muxed for this ADC. It can have up to:
289 - 16 channels, numbered from 0 to 15 (for in0..in15) on stm32f4
290 - 19 channels, numbered from 0 to 18 (for in0..in18) on stm32mp13.
291 - 20 channels, numbered from 0 to 19 (for in0..in19) on stm32h7 and
293 $ref: /schemas/types.yaml#/definitions/uint32-array
296 st,adc-diff-channels:
299 be configured as differential instead of single-ended on stm32h7 and
303 Note: At least one of "st,adc-channels" or "st,adc-diff-channels" is
307 used as single-ended and some other ones as differential (mixed). But
308 channels can't be configured both as single-ended and differential.
309 $ref: /schemas/types.yaml#/definitions/uint32-matrix
312 - description: |
316 - description: |
322 st,min-sample-time-nsecs:
325 e.g. high/low analog input source impedance, fine tune of ADC
327 array that matches "st,adc-channels" and/or "st,adc-diff-channels"
330 $ref: /schemas/types.yaml#/definitions/uint32-array
333 nvmem-cells:
335 - description: Phandle to the calibration vrefint data provided by otp
337 nvmem-cell-names:
339 - const: vrefint
342 "^channel@([0-9]|1[0-9])$":
359 diff-channels:
360 $ref: /schemas/types.yaml#/definitions/uint32-array
365 st,min-sample-time-ns:
368 e.g. high/low analog input source impedance, fine tune of ADC
372 - reg
377 - if:
381 const: st,stm32f4-adc
387 - 0x0
388 - 0x100
389 - 0x200
395 assigned-resolution-bits:
399 st,adc-channels:
406 st,adc-diff-channels: false
408 st,min-sample-time-nsecs:
415 - clocks
417 - if:
422 - st,stm32h7-adc
423 - st,stm32mp1-adc
429 - 0x0
430 - 0x100
436 assigned-resolution-bits:
440 st,adc-channels:
447 st,min-sample-time-nsecs:
454 - if:
458 const: st,stm32mp13-adc
468 assigned-resolution-bits:
472 st,adc-channels:
479 st,min-sample-time-nsecs:
487 - compatible
488 - reg
489 - interrupts
490 - '#io-channel-cells'
493 - |
494 // Example 1: with stm32f429, ADC1, single-ended channel 8
496 compatible = "st,stm32f4-adc-core";
500 clock-names = "adc";
501 st,max-clk-rate-hz = <36000000>;
502 vdda-supply = <&vdda>;
503 vref-supply = <&vref>;
504 interrupt-controller;
505 #interrupt-cells = <1>;
506 #address-cells = <1>;
507 #size-cells = <0>;
509 compatible = "st,stm32f4-adc";
510 #io-channel-cells = <1>;
513 interrupt-parent = <&adc123>;
515 st,adc-channels = <8>;
517 dma-names = "rx";
518 assigned-resolution-bits = <8>;
524 - |
526 // - channels 0 & 1 as single-ended
527 // - channels 2 & 3 as differential (with resp. 6 & 7 negative inputs)
528 #include <dt-bindings/interrupt-controller/arm-gic.h>
529 #include <dt-bindings/clock/stm32mp1-clks.h>
531 compatible = "st,stm32mp1-adc-core";
536 clock-names = "bus", "adc";
537 booster-supply = <&booster>;
538 vdd-supply = <&vdd>;
539 vdda-supply = <&vdda>;
540 vref-supply = <&vref>;
542 interrupt-controller;
543 #interrupt-cells = <1>;
544 #address-cells = <1>;
545 #size-cells = <0>;
547 compatible = "st,stm32mp1-adc";
548 #io-channel-cells = <1>;
550 interrupt-parent = <&adc12>;
552 st,adc-channels = <0 1>;
553 st,adc-diff-channels = <2 6>, <3 7>;
554 st,min-sample-time-nsecs = <5000>;
556 dma-names = "rx";
562 - |
564 // - internal channels 13, 14, 15.
565 #include <dt-bindings/interrupt-controller/arm-gic.h>
566 #include <dt-bindings/clock/stm32mp1-clks.h>
568 compatible = "st,stm32mp1-adc-core";
573 clock-names = "bus", "adc";
574 booster-supply = <&booster>;
575 vdd-supply = <&vdd>;
576 vdda-supply = <&vdda>;
577 vref-supply = <&vref>;
579 interrupt-controller;
580 #interrupt-cells = <1>;
581 #address-cells = <1>;
582 #size-cells = <0>;
584 compatible = "st,stm32mp1-adc";
585 #io-channel-cells = <1>;
588 #address-cells = <1>;
589 #size-cells = <0>;
593 st,min-sample-time-ns = <9000>;
598 st,min-sample-time-ns = <9000>;
603 st,min-sample-time-ns = <9000>;