Lines Matching +full:3 +full:- +full:cell

8 -------------------
10 - #address-cells  - should be <3>. Read more about addresses below.
11 - #size-cells     - should be <0>.
12 - compatible      - name of the I3C master controller driving the I3C bus
16 The node describing an I3C bus should be named i3c-master.
19 -------------------
24 - i3c-scl-hz: frequency of the SCL signal used for I3C transfers.
27 - i2c-scl-hz: frequency of the SCL signal used for I2C transfers.
40 --------------------------------------
41 - reg: contains 3 cells
42   + first cell : still encoding the I2C address. 10 bit addressing is not
46   + second cell: shall be 0
48   + third cell: shall encode the I3C LVR (Legacy Virtual Register)
56 	* 3-7: reserved
62 	bit[3:0]: device type
63 	* 0-15: reserved
65 The I2C node unit-address should always match the first cell of the reg
66 property: <device-type>@<i2c-address>.
83 The I3C device should be names <device-type>@<static-i2c-address>,<i3c-pid>,
84 where device-type is describing the type of device connected on the bus
85 (gpio-controller, sensor, ...).
88 -------------------
89 - reg: contains 3 cells
90   + first cell : encodes the static I2C address. Should be 0 if the device does
93   + second and third cells: should encode the ProvisionalID. The second cell
94 			    contains the manufacturer ID left-shifted by 1.
95 			    The third cell contains ORing of the part ID
96 			    left-shifted by 16, the instance ID left-shifted
102 -------------------
103 - assigned-address: dynamic address to be assigned to this device. This
105 		    address (first cell of the reg property != 0).
110 	i3c-master@d040000 {
111 		compatible = "cdns,i3c-master";
113 		clock-names = "pclk", "sysclk";
114 		interrupts = <3 0>;
116 		#address-cells = <3>;
117 		#size-cells = <0>;
118 		i2c-scl-hz = <100000>;
129 			assigned-address = <0xa>;