Lines Matching +full:sm8250 +full:- +full:pinctrl
1 # SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/i2c/qcom,i2c-cci.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Loic Poulain <loic.poulain@linaro.org>
11 - Robert Foss <robert.foss@linaro.org>
16 - enum:
17 - qcom,msm8226-cci
18 - qcom,msm8974-cci
19 - qcom,msm8996-cci
21 - items:
22 - enum:
23 - qcom,msm8916-cci
24 - const: qcom,msm8226-cci # CCI v1
26 - items:
27 - enum:
28 - qcom,sc7280-cci
29 - qcom,sdm845-cci
30 - qcom,sm6350-cci
31 - qcom,sm8250-cci
32 - qcom,sm8450-cci
33 - const: qcom,msm8996-cci # CCI v2
35 "#address-cells":
38 "#size-cells":
45 clock-names:
52 power-domains:
59 "^i2c-bus@[01]$":
60 $ref: /schemas/i2c/i2c-controller.yaml#
67 clock-frequency:
71 - compatible
72 - clock-names
73 - clocks
74 - interrupts
75 - reg
78 - if:
83 - qcom,msm8996-cci
86 - power-domains
88 - if:
93 - qcom,msm8226-cci
94 - qcom,msm8916-cci
97 i2c-bus@1: false
99 - if:
103 - contains:
105 - qcom,msm8974-cci
107 - const: qcom,msm8226-cci
112 clock-names:
114 - const: camss_top_ahb
115 - const: cci_ahb
116 - const: cci
118 - if:
122 - contains:
124 - qcom,msm8916-cci
126 - const: qcom,msm8996-cci
131 clock-names:
133 - const: camss_top_ahb
134 - const: cci_ahb
135 - const: cci
136 - const: camss_ahb
138 - if:
143 - qcom,sdm845-cci
144 - qcom,sm6350-cci
149 clock-names:
151 - const: camnoc_axi
152 - const: soc_ahb
153 - const: slow_ahb_src
154 - const: cpas_ahb
155 - const: cci
156 - const: cci_src
158 - if:
163 - qcom,sc7280-cci
164 - qcom,sm8250-cci
165 - qcom,sm8450-cci
171 clock-names:
173 - const: camnoc_axi
174 - const: slow_ahb_src
175 - const: cpas_ahb
176 - const: cci
177 - const: cci_src
182 - |
183 #include <dt-bindings/clock/qcom,camcc-sdm845.h>
184 #include <dt-bindings/gpio/gpio.h>
185 #include <dt-bindings/interrupt-controller/arm-gic.h>
189 compatible = "qcom,sdm845-cci", "qcom,msm8996-cci";
190 #address-cells = <1>;
191 #size-cells = <0>;
194 power-domains = <&clock_camcc TITAN_TOP_GDSC>;
202 clock-names = "camnoc_axi",
209 assigned-clocks = <&clock_camcc CAM_CC_CAMNOC_AXI_CLK>,
211 assigned-clock-rates = <80000000>,
214 pinctrl-names = "default", "sleep";
215 pinctrl-0 = <&cci0_default &cci1_default>;
216 pinctrl-1 = <&cci0_sleep &cci1_sleep>;
218 i2c-bus@0 {
220 clock-frequency = <1000000>;
221 #address-cells = <1>;
222 #size-cells = <0>;
228 reset-gpios = <&tlmm 9 GPIO_ACTIVE_LOW>;
229 pinctrl-names = "default";
230 pinctrl-0 = <&cam0_default>;
233 clock-names = "xvclk";
234 clock-frequency = <19200000>;
236 dovdd-supply = <&vreg_lvs1a_1p8>;
237 avdd-supply = <&cam0_avdd_2v8>;
238 dvdd-supply = <&cam0_dvdd_1v2>;
242 link-frequencies = /bits/ 64 <360000000 180000000>;
243 data-lanes = <1 2 3 4>;
244 remote-endpoint = <&csiphy0_ep>;
250 cci_i2c1: i2c-bus@1 {
252 clock-frequency = <1000000>;
253 #address-cells = <1>;
254 #size-cells = <0>;
260 enable-gpios = <&tlmm 21 GPIO_ACTIVE_HIGH>;
261 pinctrl-names = "default";
262 pinctrl-0 = <&cam3_default>;
265 clock-names = "xclk";
266 clock-frequency = <24000000>;
268 vdddo-supply = <&vreg_lvs1a_1p8>;
269 vdda-supply = <&cam3_avdd_2v8>;
273 data-lanes = <0 1>;
274 link-frequencies = /bits/ 64 <240000000 319200000>;
275 remote-endpoint = <&csiphy3_ep>;