Lines Matching +full:tegra20 +full:- +full:host1x

1 NVIDIA Tegra20/Tegra30/Tegra114 I2C controller driver.
4 - compatible : For Tegra20, must be one of "nvidia,tegra20-i2c-dvc" or
5   "nvidia,tegra20-i2c".  For Tegra30, must be "nvidia,tegra30-i2c".
6   For Tegra114, must be "nvidia,tegra114-i2c".  Otherwise, must be
7   "nvidia,<chip>-i2c", plus at least one of the above, where <chip> is
10   nvidia,tegra20-i2c-dvc: Tegra20 has specific I2C controller called as DVC I2C
14 	"nvidia,tegra20-i2c-dvc".
15   nvidia,tegra20-i2c: Tegra20 has 4 generic I2C controller. This can support
16 	master and slave mode of I2C communication. The i2c-tegra driver only
18 	only compatible with "nvidia,tegra20-i2c".
19   nvidia,tegra30-i2c: Tegra30 has 5 generic I2C controller. This controller is
20 	very much similar to Tegra20 I2C controller with additional feature:
23 	compatible with "nvidia,tegra30-i2c" to enable the continue transfer
24 	support. This is also compatible with "nvidia,tegra20-i2c" without
26   nvidia,tegra114-i2c: Tegra114 has 5 generic I2C controller. This controller is
29 	 - Tegra30/Tegra20 I2C controller has 2 clock source called div-clk and
30 	   fast-clk. Tegra114 has only one clock source called as div-clk and
32 	 - Tegra30/Tegra20 I2C controller has enabled per packet transfer by
37 	with "nvidia,tegra114-i2c".
38   nvidia,tegra210-i2c-vi: Tegra210 has one I2C controller that is on host1x bus
39 	and is part of VE power domain and typically used for camera use-cases.
44 - reg: Should contain I2C controller registers physical address and length.
45 - interrupts: Should contain I2C controller interrupts.
46 - address-cells: Address cells for I2C device address.
47 - size-cells: Size of the I2C device address.
48 - clocks: Must contain an entry for each entry in clock-names.
49   See ../clocks/clock-bindings.txt for details.
50 - clock-names: Must include the following entries:
51   Tegra20/Tegra30:
52   - div-clk
53   - fast-clk
55   - div-clk
57   - div-clk
58   - slow (only for nvidia,tegra210-i2c-vi compatible node)
59 - resets: Must contain an entry for each entry in reset-names.
61 - reset-names: Must include the following entries:
62   - i2c
63 - power-domains: Only for nvidia,tegra210-i2c-vi compatible node and must
65   tegra210-i2c-vi:
66   - pd_venc
67 - dmas: Must contain an entry for each entry in clock-names.
69 - dma-names: Must include the following entries:
70   - rx
71   - tx
76 		compatible = "nvidia,tegra20-i2c";
79 		#address-cells = <1>;
80 		#size-cells = <0>;
82 		clock-names = "div-clk", "fast-clk";
84 		reset-names = "i2c";
86 		dma-names = "rx", "tx";