Lines Matching +full:firmware +full:- +full:reset

1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/gpu/host1x/nvidia,tegra234-nvdec.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
15   - Thierry Reding <treding@gmail.com>
16   - Mikko Perttunen <mperttunen@nvidia.com>
20     pattern: "^nvdec@[0-9a-f]*$"
24       - nvidia,tegra234-nvdec
32   clock-names:
34       - const: nvdec
35       - const: fuse
36       - const: tsec_pka
41   reset-names:
43       - const: nvdec
45   power-domains:
51   dma-coherent: true
55       - description: DMA read memory client
56       - description: DMA write memory client
58   interconnect-names:
60       - const: dma-mem
61       - const: write
63   nvidia,memory-controller:
67       firmware secure carveout. This carveout is configured by the bootloader and
70   nvidia,bl-manifest-offset:
73       Offset to bootloader manifest from beginning of firmware that was configured by
76   nvidia,bl-code-offset:
79       Offset to bootloader code section from beginning of firmware that was configured by
82   nvidia,bl-data-offset:
85       Offset to bootloader data section from beginning of firmware that was configured by
88   nvidia,os-manifest-offset:
91       Offset to operating system manifest from beginning of firmware that was configured by
94   nvidia,os-code-offset:
97       Offset to operating system code section from beginning of firmware that was configured by
100   nvidia,os-data-offset:
103       Offset to operating system data section from beginning of firmware that was configured
107   - compatible
108   - reg
109   - clocks
110   - clock-names
111   - resets
112   - reset-names
113   - power-domains
114   - nvidia,memory-controller
115   - nvidia,bl-manifest-offset
116   - nvidia,bl-code-offset
117   - nvidia,bl-data-offset
118   - nvidia,os-manifest-offset
119   - nvidia,os-code-offset
120   - nvidia,os-data-offset
125   - |
126     #include <dt-bindings/clock/tegra234-clock.h>
127     #include <dt-bindings/memory/tegra234-mc.h>
128     #include <dt-bindings/power/tegra234-powergate.h>
129     #include <dt-bindings/reset/tegra234-reset.h>
132             compatible = "nvidia,tegra234-nvdec";
137             clock-names = "nvdec", "fuse", "tsec_pka";
139             reset-names = "nvdec";
140             power-domains = <&bpmp TEGRA234_POWER_DOMAIN_NVDEC>;
143             interconnect-names = "dma-mem", "write";
145             dma-coherent;
147             nvidia,memory-controller = <&mc>;
150             nvidia,bl-manifest-offset = <0>;
151             nvidia,bl-data-offset = <0>;
152             nvidia,bl-code-offset = <0>;
153             nvidia,os-manifest-offset = <0>;
154             nvidia,os-data-offset = <0>;
155             nvidia,os-code-offset = <0>;