Lines Matching +full:tegra210 +full:- +full:host1x
1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/gpu/host1x/nvidia,tegra210-nvjpg.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 NVJPG is the hardware JPEG decoder and encoder present on NVIDIA Tegra210
11 and newer chips. It is located on the Host1x bus and typically programmed
12 through Host1x channels.
15 - Thierry Reding <treding@gmail.com>
16 - Mikko Perttunen <mperttunen@nvidia.com>
20 pattern: "^nvjpg@[0-9a-f]*$"
24 - nvidia,tegra210-nvjpg
25 - nvidia,tegra186-nvjpg
26 - nvidia,tegra194-nvjpg
34 clock-names:
36 - const: nvjpg
41 reset-names:
43 - const: nvjpg
45 power-domains:
51 dma-coherent: true
55 - description: DMA read memory client
56 - description: DMA write memory client
58 interconnect-names:
60 - const: dma-mem
61 - const: write
64 - compatible
65 - reg
66 - clocks
67 - clock-names
68 - resets
69 - reset-names
70 - power-domains
75 - |
76 #include <dt-bindings/clock/tegra186-clock.h>
77 #include <dt-bindings/memory/tegra186-mc.h>
78 #include <dt-bindings/power/tegra186-powergate.h>
79 #include <dt-bindings/reset/tegra186-reset.h>
82 compatible = "nvidia,tegra186-nvjpg";
85 clock-names = "nvjpg";
87 reset-names = "nvjpg";
89 power-domains = <&bpmp TEGRA186_POWER_DOMAIN_NVJPG>;
92 interconnect-names = "dma-mem", "write";