Lines Matching +full:per +full:- +full:pin

1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/fpga/xlnx,fpga-selectmap.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10   - Charles Perry <charles.perry@savoirfairelinux.com>
15   the x8 mode is supported where data is loaded at one byte per rising edge of
16   the clock, with the MSB of each byte presented to the D0 pin.
22   - $ref: /schemas/memory-controllers/mc-peripheral-props.yaml#
27       - xlnx,fpga-xc7s-selectmap
28       - xlnx,fpga-xc7a-selectmap
29       - xlnx,fpga-xc7k-selectmap
30       - xlnx,fpga-xc7v-selectmap
37   prog-gpios:
39       config pin (referred to as PROGRAM_B in the manual)
42   done-gpios:
44       config status pin (referred to as DONE in the manual)
47   init-gpios:
49       initialization status and configuration error pin
53   csi-gpios:
55       chip select pin (referred to as CSI_B in the manual)
59   rdwr-gpios:
61       read/write select pin (referred to as RDWR_B in the manual)
62       Optional gpio for if the bus controller does not provide this pin.
66   - compatible
67   - reg
68   - prog-gpios
69   - done-gpios
70   - init-gpios
75   - |
76     #include <dt-bindings/gpio/gpio.h>
77     fpga-mgr@8000000 {
78       compatible = "xlnx,fpga-xc7s-selectmap";
80       prog-gpios = <&gpio5 5 GPIO_ACTIVE_LOW>;
81       init-gpios = <&gpio5 8 GPIO_ACTIVE_LOW>;
82       done-gpios = <&gpio2 30 GPIO_ACTIVE_HIGH>;
83       csi-gpios = <&gpio3 19 GPIO_ACTIVE_LOW>;
84       rdwr-gpios = <&gpio3 10 GPIO_ACTIVE_LOW>;