Lines Matching +full:pr +full:- +full:decoupler

1 Xilinx LogiCORE Partial Reconfig Decoupler Softcore
3 The Xilinx LogiCORE Partial Reconfig Decoupler manages one or more
11 Softcore is compatible with the Xilinx LogiCORE pr-decoupler.
15 and AXI4-Lite interfaces on a Reconfigurable Partition when it is
19 The Driver supports only MMIO handling. A PR region can have multiple
20 PR Decouplers which can be handled independently or chained via decouple/
24 - compatible		: Should contain "xlnx,pr-decoupler-1.00" followed by
25                           "xlnx,pr-decoupler" or
26                           "xlnx,dfx-axi-shutdown-manager-1.00" followed by
27                           "xlnx,dfx-axi-shutdown-manager"
28 - regs			: base address and size for decoupler module
29 - clocks		: input clock to IP
30 - clock-names		: should contain "aclk"
32 See Documentation/devicetree/bindings/fpga/fpga-region.txt and
33 Documentation/devicetree/bindings/fpga/fpga-bridge.txt for generic bindings.
36 Partial Reconfig Decoupler:
37 	fpga-bridge@100000450 {
38 		compatible = "xlnx,pr-decoupler-1.00",
39 			     "xlnx-pr-decoupler";
42 		clock-names = "aclk";
43 		bridge-enable = <0>;
47 	fpga-bridge@100000450 {
48 		compatible = "xlnx,dfx-axi-shutdown-manager-1.00",
49 			     "xlnx,dfx-axi-shutdown-manager";
52 		clock-names = "aclk";
53 		bridge-enable = <0>;