Lines Matching +full:- +full:pdma
8 - compatible : Should be "altr,socfpga-ecc-manager"
9 - #address-cells: must be 1
10 - #size-cells: must be 1
11 - ranges : standard definition, should translate from local addresses
17 - compatible : Should be "altr,socfpga-l2-ecc"
18 - reg : Address and size for ECC error interrupt clear registers.
19 - interrupts : Should be single bit error interrupt, then double bit error
24 - compatible : Should be "altr,socfpga-ocram-ecc"
25 - reg : Address and size for ECC error interrupt clear registers.
26 - iram : phandle to On-Chip RAM definition.
27 - interrupts : Should be single bit error interrupt, then double bit error
33 compatible = "altr,socfpga-ecc-manager";
34 #address-cells = <1>;
35 #size-cells = <1>;
38 l2-ecc@ffd08140 {
39 compatible = "altr,socfpga-l2-ecc";
44 ocram-ecc@ffd08144 {
45 compatible = "altr,socfpga-ocram-ecc";
58 - compatible : Should be "altr,socfpga-a10-ecc-manager"
59 - altr,sysgr-syscon : phandle to Arria10 System Manager Block
61 - #address-cells: must be 1
62 - #size-cells: must be 1
63 - interrupts : Should be single bit error interrupt, then double bit error
65 - interrupt-controller : boolean indicator that ECC Manager is an interrupt controller
66 - #interrupt-cells : must be set to 2.
67 - ranges : standard definition, should translate from local addresses
73 - compatible : Should be "altr,socfpga-a10-l2-ecc"
74 - reg : Address and size for ECC error interrupt clear registers.
75 - interrupts : Should be single bit error interrupt, then double bit error
78 On-Chip RAM ECC
80 - compatible : Should be "altr,socfpga-a10-ocram-ecc"
81 - reg : Address and size for ECC block registers.
82 - interrupts : Should be single bit error interrupt, then double bit error
87 - compatible : Should be "altr,socfpga-eth-mac-ecc"
88 - reg : Address and size for ECC block registers.
89 - altr,ecc-parent : phandle to parent Ethernet node.
90 - interrupts : Should be single bit error interrupt, then double bit error
95 - compatible : Should be "altr,socfpga-nand-ecc"
96 - reg : Address and size for ECC block registers.
97 - altr,ecc-parent : phandle to parent NAND node.
98 - interrupts : Should be single bit error interrupt, then double bit error
103 - compatible : Should be "altr,socfpga-dma-ecc"
104 - reg : Address and size for ECC block registers.
105 - altr,ecc-parent : phandle to parent DMA node.
106 - interrupts : Should be single bit error interrupt, then double bit error
111 - compatible : Should be "altr,socfpga-usb-ecc"
112 - reg : Address and size for ECC block registers.
113 - altr,ecc-parent : phandle to parent USB node.
114 - interrupts : Should be single bit error interrupt, then double bit error
119 - compatible : Should be "altr,socfpga-qspi-ecc"
120 - reg : Address and size for ECC block registers.
121 - altr,ecc-parent : phandle to parent QSPI node.
122 - interrupts : Should be single bit error interrupt, then double bit error
127 - compatible : Should be "altr,socfpga-sdmmc-ecc"
128 - reg : Address and size for ECC block registers.
129 - altr,ecc-parent : phandle to parent SD/MMC node.
130 - interrupts : Should be single bit error interrupt, then double bit error
137 compatible = "altr,socfpga-a10-ecc-manager";
138 altr,sysmgr-syscon = <&sysmgr>;
139 #address-cells = <1>;
140 #size-cells = <1>;
143 interrupt-controller;
144 #interrupt-cells = <2>;
147 l2-ecc@ffd06010 {
148 compatible = "altr,socfpga-a10-l2-ecc";
154 ocram-ecc@ff8c3000 {
155 compatible = "altr,socfpga-a10-ocram-ecc";
161 emac0-rx-ecc@ff8c0800 {
162 compatible = "altr,socfpga-eth-mac-ecc";
164 altr,ecc-parent = <&gmac0>;
169 emac0-tx-ecc@ff8c0c00 {
170 compatible = "altr,socfpga-eth-mac-ecc";
172 altr,ecc-parent = <&gmac0>;
177 nand-buf-ecc@ff8c2000 {
178 compatible = "altr,socfpga-nand-ecc";
180 altr,ecc-parent = <&nand>;
185 nand-rd-ecc@ff8c2400 {
186 compatible = "altr,socfpga-nand-ecc";
188 altr,ecc-parent = <&nand>;
193 nand-wr-ecc@ff8c2800 {
194 compatible = "altr,socfpga-nand-ecc";
196 altr,ecc-parent = <&nand>;
201 dma-ecc@ff8c8000 {
202 compatible = "altr,socfpga-dma-ecc";
204 altr,ecc-parent = <&pdma>;
208 usb0-ecc@ff8c8800 {
209 compatible = "altr,socfpga-usb-ecc";
211 altr,ecc-parent = <&usb0>;
216 qspi-ecc@ff8c8400 {
217 compatible = "altr,socfpga-qspi-ecc";
219 altr,ecc-parent = <&qspi>;
224 sdmmc-ecc@ff8c2c00 {
225 compatible = "altr,socfpga-sdmmc-ecc";
227 altr,ecc-parent = <&mmc>;
244 - compatible : Should be "altr,socfpga-s10-ecc-manager"
245 - altr,sysgr-syscon : phandle to Stratix10 System Manager Block
247 - interrupts : Should be single bit error interrupt.
248 - interrupt-controller : boolean indicator that ECC Manager is an interrupt controller
249 - #interrupt-cells : must be set to 2.
250 - #address-cells: must be 1
251 - #size-cells: must be 1
252 - ranges : standard definition, should translate from local addresses
258 - compatible : Should be "altr,sdram-edac-s10"
259 - interrupts : Should be single bit error interrupt.
261 On-Chip RAM ECC
263 - compatible : Should be "altr,socfpga-s10-ocram-ecc"
264 - reg : Address and size for ECC block registers.
265 - altr,ecc-parent : phandle to parent OCRAM node.
266 - interrupts : Should be single bit error interrupt.
270 - compatible : Should be "altr,socfpga-s10-eth-mac-ecc"
271 - reg : Address and size for ECC block registers.
272 - altr,ecc-parent : phandle to parent Ethernet node.
273 - interrupts : Should be single bit error interrupt.
277 - compatible : Should be "altr,socfpga-s10-nand-ecc"
278 - reg : Address and size for ECC block registers.
279 - altr,ecc-parent : phandle to parent NAND node.
280 - interrupts : Should be single bit error interrupt.
284 - compatible : Should be "altr,socfpga-s10-dma-ecc"
285 - reg : Address and size for ECC block registers.
286 - altr,ecc-parent : phandle to parent DMA node.
287 - interrupts : Should be single bit error interrupt.
291 - compatible : Should be "altr,socfpga-s10-usb-ecc"
292 - reg : Address and size for ECC block registers.
293 - altr,ecc-parent : phandle to parent USB node.
294 - interrupts : Should be single bit error interrupt.
298 - compatible : Should be "altr,socfpga-s10-sdmmc-ecc"
299 - reg : Address and size for ECC block registers.
300 - altr,ecc-parent : phandle to parent SD/MMC node.
301 - interrupts : Should be single bit error interrupt for port A
307 compatible = "altr,socfpga-s10-ecc-manager";
308 altr,sysmgr-syscon = <&sysmgr>;
309 #address-cells = <1>;
310 #size-cells = <1>;
312 interrupt-controller;
313 #interrupt-cells = <2>;
317 compatible = "altr,sdram-edac-s10";
321 ocram-ecc@ff8cc000 {
322 compatible = "altr,socfpga-s10-ocram-ecc";
324 altr,ecc-parent = <&ocram>;
328 emac0-rx-ecc@ff8c0000 {
329 compatible = "altr,socfpga-s10-eth-mac-ecc";
331 altr,ecc-parent = <&gmac0>;
335 emac0-tx-ecc@ff8c0400 {
336 compatible = "altr,socfpga-s10-eth-mac-ecc";
338 altr,ecc-parent = <&gmac0>;
342 nand-buf-ecc@ff8c8000 {
343 compatible = "altr,socfpga-s10-nand-ecc";
345 altr,ecc-parent = <&nand>;
349 nand-rd-ecc@ff8c8400 {
350 compatible = "altr,socfpga-s10-nand-ecc";
352 altr,ecc-parent = <&nand>;
356 nand-wr-ecc@ff8c8800 {
357 compatible = "altr,socfpga-s10-nand-ecc";
359 altr,ecc-parent = <&nand>;
363 dma-ecc@ff8c9000 {
364 compatible = "altr,socfpga-s10-dma-ecc";
366 altr,ecc-parent = <&pdma>;
369 usb0-ecc@ff8c4000 {
370 compatible = "altr,socfpga-s10-usb-ecc";
372 altr,ecc-parent = <&usb0>;
376 sdmmc-ecc@ff8c8c00 {
377 compatible = "altr,socfpga-s10-sdmmc-ecc";
379 altr,ecc-parent = <&mmc>;