Lines Matching +full:jz4780 +full:- +full:nand
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Paul Cercueil <paul@crapouillou.net>
13 - $ref: dma-controller.yaml#
18 - enum:
19 - ingenic,jz4740-dma
20 - ingenic,jz4725b-dma
21 - ingenic,jz4755-dma
22 - ingenic,jz4760-dma
23 - ingenic,jz4760-bdma
24 - ingenic,jz4760-mdma
25 - ingenic,jz4760b-dma
26 - ingenic,jz4760b-bdma
27 - ingenic,jz4760b-mdma
28 - ingenic,jz4770-dma
29 - ingenic,jz4780-dma
30 - ingenic,x1000-dma
31 - ingenic,x1830-dma
32 - items:
33 - const: ingenic,jz4770-bdma
34 - const: ingenic,jz4760b-bdma
38 - description: Channel-specific registers
39 - description: System control registers
47 "#dma-cells":
53 - Request type: The DMA request type specifies the device endpoint that
55 If "#dma-cells" is 2, the request type is a single cell, and the
57 If "#dma-cells" is 3, the request type has two cells; the first
62 - Channel: If set to 0xffffffff, any available channel will be allocated
65 ingenic,reserved-channels property.
67 ingenic,reserved-channels:
73 1, which can be configured to have special behaviour for NAND/BCH
77 - compatible
78 - reg
79 - interrupts
80 - clocks
85 - |
86 #include <dt-bindings/clock/ingenic,jz4780-cgu.h>
87 dma: dma-controller@13420000 {
88 compatible = "ingenic,jz4780-dma";
91 interrupt-parent = <&intc>;
96 #dma-cells = <2>;
98 ingenic,reserved-channels = <0x3>;