Lines Matching +full:clock +full:- +full:master
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/dma/arm-pl08x.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Vinod Koul <vkoul@kernel.org>
13 - $ref: /schemas/arm/primecell.yaml#
14 - $ref: dma-controller.yaml#
22 - arm,pl080
23 - arm,pl081
25 - compatible
30 - items:
31 - enum:
32 - arm,pl080
33 - arm,pl081
34 - const: arm,primecell
35 - items:
36 - const: faraday,ftdma020
37 - const: arm,pl080
38 - const: arm,primecell
50 description: The clock running the IP core clock
52 clock-names:
55 lli-bus-interface-ahb1:
57 description: if AHB master 1 is eligible for fetching LLIs
59 lli-bus-interface-ahb2:
61 description: if AHB master 2 is eligible for fetching LLIs
63 mem-bus-interface-ahb1:
65 description: if AHB master 1 is eligible for fetching memory contents
67 mem-bus-interface-ahb2:
69 description: if AHB master 2 is eligible for fetching memory contents
71 memcpy-burst-size:
74 - 1
75 - 4
76 - 8
77 - 16
78 - 32
79 - 64
80 - 128
81 - 256
84 memcpy-bus-width:
87 - 8
88 - 16
89 - 32
90 - 64
97 - reg
98 - interrupts
99 - clocks
100 - clock-names
101 - "#dma-cells"
106 - |
107 dmac0: dma-controller@10130000 {
110 interrupt-parent = <&vica>;
113 clock-names = "apb_pclk";
114 lli-bus-interface-ahb1;
115 lli-bus-interface-ahb2;
116 mem-bus-interface-ahb2;
117 memcpy-burst-size = <256>;
118 memcpy-bus-width = <32>;
119 #dma-cells = <2>;
121 - |
122 #include <dt-bindings/interrupt-controller/irq.h>
123 #include <dt-bindings/reset/cortina,gemini-reset.h>
124 #include <dt-bindings/clock/cortina,gemini-clock.h>
125 dma-controller@67000000 {
128 arm,primecell-periphid = <0x0003b080>;
133 clock-names = "apb_pclk";
135 lli-bus-interface-ahb2;
136 mem-bus-interface-ahb2;
137 memcpy-burst-size = <256>;
138 memcpy-bus-width = <32>;
139 #dma-cells = <2>;