Lines Matching +full:reg +full:- +full:property
3 - sti-vtg: video timing generator
5 - compatible: "st,vtg"
6 - reg: Physical base address of the IP registers and length of memory mapped region.
8 - interrupts : VTG interrupt number to the CPU.
9 - st,slave: phandle on a slave vtg
11 - sti-vtac: video timing advanced inter dye communication Rx and TX
13 - compatible: "st,vtac-main" or "st,vtac-aux"
14 - reg: Physical base address of the IP registers and length of memory mapped region.
15 - clocks: from common clock binding: handle hardware IP needed clocks, the
17 See ../clocks/clock-bindings.txt for details.
18 - clock-names: names of the clocks listed in clocks property in the same
21 - sti-display-subsystem: Master device for DRM sub-components
22 This device must be the parent of all the sub-components and is responsible
25 - compatible: "st,sti-display-subsystem"
26 - ranges: to allow probing of subdevices
28 - sti-compositor: frame compositor engine
29 must be a child of sti-display-subsystem
31 - compatible: "st,stih<chip>-compositor"
32 - reg: Physical base address of the IP registers and length of memory mapped region.
33 - clocks: from common clock binding: handle hardware IP needed clocks, the
35 See ../clocks/clock-bindings.txt for details.
36 - clock-names: names of the clocks listed in clocks property in the same
38 - resets: resets to be used by the device
40 - reset-names: names of the resets listed in resets property in the same
42 - st,vtg: phandle(s) on vtg device (main and aux) nodes.
44 - sti-tvout: video out hardware block
45 must be a child of sti-display-subsystem
47 - compatible: "st,stih<chip>-tvout"
48 - reg: Physical base address of the IP registers and length of memory mapped region.
49 - reg-names: names of the mapped memory regions listed in regs property in
51 - resets: resets to be used by the device
53 - reset-names: names of the resets listed in resets property in the same
56 - sti-hdmi: hdmi output block
57 must be a child of sti-display-subsystem
59 - compatible: "st,stih<chip>-hdmi";
60 - reg: Physical base address of the IP registers and length of memory mapped region.
61 - reg-names: names of the mapped memory regions listed in regs property in
63 - interrupts : HDMI interrupt number to the CPU.
64 - interrupt-names: names of the interrupts listed in interrupts property in
66 - clocks: from common clock binding: handle hardware IP needed clocks, the
68 - clock-names: names of the clocks listed in clocks property in the same
70 - ddc: phandle of an I2C controller used for DDC EDID probing
72 sti-hda:
74 must be a child of sti-display-subsystem
75 - compatible: "st,stih<chip>-hda"
76 - reg: Physical base address of the IP registers and length of memory mapped region.
77 - reg-names: names of the mapped memory regions listed in regs property in
79 - clocks: from common clock binding: handle hardware IP needed clocks, the
81 See ../clocks/clock-bindings.txt for details.
82 - clock-names: names of the clocks listed in clocks property in the same
85 sti-dvo:
87 must be a child of sti-display-subsystem
88 - compatible: "st,stih<chip>-dvo"
89 - reg: Physical base address of the IP registers and length of memory mapped region.
90 - reg-names: names of the mapped memory regions listed in regs property in
92 - clocks: from common clock binding: handle hardware IP needed clocks, the
94 See ../clocks/clock-bindings.txt for details.
95 - clock-names: names of the clocks listed in clocks property in the same
97 - pinctrl-0: pin control handle
98 - pinctrl-names: names of the pin control states to use
99 - sti,panel: phandle of the panel connected to the DVO output
101 sti-hqvdp:
102 must be a child of sti-display-subsystem
104 - compatible: "st,stih<chip>-hqvdp"
105 - reg: Physical base address of the IP registers and length of memory mapped region.
106 - clocks: from common clock binding: handle hardware IP needed clocks, the
108 See ../clocks/clock-bindings.txt for details.
109 - clock-names: names of the clocks listed in clocks property in the same
111 - resets: resets to be used by the device
113 - reset-names: names of the resets listed in resets property in the same
115 - st,vtg: phandle on vtg main device node.
122 vtg_main_slave: sti-vtg-main-slave@fe85a800 {
124 reg = <0xfe85A800 0x300>;
128 vtg_main: sti-vtg-main-master@fd348000 {
130 reg = <0xfd348000 0x400>;
134 vtg_aux_slave: sti-vtg-aux-slave@fd348400 {
136 reg = <0xfe858200 0x300>;
140 vtg_aux: sti-vtg-aux-master@fd348400 {
142 reg = <0xfd348400 0x400>;
147 sti-vtac-rx-main@fee82800 {
148 compatible = "st,vtac-main";
149 reg = <0xfee82800 0x200>;
150 clock-names = "vtac";
154 sti-vtac-rx-aux@fee82a00 {
155 compatible = "st,vtac-aux";
156 reg = <0xfee82a00 0x200>;
157 clock-names = "vtac";
161 sti-vtac-tx-main@fd349000 {
162 compatible = "st,vtac-main";
163 reg = <0xfd349000 0x200>, <0xfd320000 0x10000>;
164 clock-names = "vtac";
168 sti-vtac-tx-aux@fd349200 {
169 compatible = "st,vtac-aux";
170 reg = <0xfd349200 0x200>, <0xfd320000 0x10000>;
171 clock-names = "vtac";
175 sti-display-subsystem {
176 compatible = "st,sti-display-subsystem";
179 sti-compositor@fd340000 {
180 compatible = "st,stih416-compositor";
181 reg = <0xfd340000 0x1000>;
182 clock-names = "compo_main", "compo_aux",
186 reset-names = "compo-main", "compo-aux";
191 sti-tvout@fe000000 {
192 compatible = "st,stih416-tvout";
193 reg = <0xfe000000 0x1000>, <0xfe85a000 0x400>, <0xfe830000 0x10000>;
194 reg-names = "tvout-reg", "hda-reg", "syscfg";
195 reset-names = "tvout";
199 sti-hdmi@fe85c000 {
200 compatible = "st,stih416-hdmi";
201 reg = <0xfe85c000 0x1000>, <0xfe830000 0x10000>;
202 reg-names = "hdmi-reg", "syscfg";
204 interrupt-names = "irq";
205 clock-names = "pix", "tmds", "phy", "audio";
209 sti-hda@fe85a000 {
210 compatible = "st,stih416-hda";
211 reg = <0xfe85a000 0x400>, <0xfe83085c 0x4>;
212 reg-names = "hda-reg", "video-dacs-ctrl";
213 clock-names = "pix", "hddac";
217 sti-dvo@8d00400 {
218 compatible = "st,stih407-dvo";
219 reg = <0x8d00400 0x200>;
220 reg-names = "dvo-reg";
221 clock-names = "dvo_pix", "dvo",
225 pinctrl-names = "default";
226 pinctrl-0 = <&pinctrl_dvo>;
230 sti-hqvdp@9c000000 {
231 compatible = "st,stih407-hqvdp";
232 reg = <0x9C00000 0x100000>;
233 clock-names = "hqvdp", "pix_main";
235 reset-names = "hqvdp";