Lines Matching +full:exynos5433 +full:- +full:hdmi
1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
4 $id: http://devicetree.org/schemas/display/samsung/samsung,exynos-hdmi.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Samsung Exynos SoC HDMI
10 - Inki Dae <inki.dae@samsung.com>
11 - Seung-Woo Kim <sw0312.kim@samsung.com>
12 - Kyungmin Park <kyungmin.park@samsung.com>
13 - Krzysztof Kozlowski <krzk@kernel.org>
18 - samsung,exynos4210-hdmi
19 - samsung,exynos4212-hdmi
20 - samsung,exynos5420-hdmi
21 - samsung,exynos5433-hdmi
27 clock-names:
34 Phandle to the HDMI DDC node.
36 hdmi-en-supply:
38 Provides voltage source for DCC lines available on HDMI connector. When
39 there is no power provided for DDC epprom, some TV-sets do not pulls up
40 HPD (hot plug detect) line, what causes HDMI block to stay turned off.
41 When provided, the regulator allows TV-set correctly signal HPD event.
43 hpd-gpios:
53 description: Phandle to the HDMI PHY node.
60 power-domains:
66 samsung,syscon-phandle:
71 samsung,sysreg-phandle:
76 '#sound-dai-cells':
79 vdd-supply:
81 VDD 1.0V HDMI TX.
83 vdd_osc-supply:
85 VDD 1.8V HDMI OSC.
87 vdd_pll-supply:
89 VDD 1.0V HDMI PLL.
92 - compatible
93 - clocks
94 - clock-names
95 - ddc
96 - hpd-gpios
97 - interrupts
98 - phy
99 - reg
100 - samsung,syscon-phandle
101 - '#sound-dai-cells'
102 - vdd-supply
103 - vdd_osc-supply
104 - vdd_pll-supply
107 - if:
111 const: samsung,exynos5433-hdmi
116 - description: Gate of HDMI IP APB bus.
117 - description: Gate of HDMI-PHY IP APB bus.
118 - description: Gate of HDMI TMDS clock.
119 - description: Gate of HDMI pixel clock.
120 - description: TMDS clock generated by HDMI-PHY.
121 - description: MUX used to switch between oscclk and tmds_clko,
122 respectively if HDMI-PHY is off and operational.
123 - description: Pixel clock generated by HDMI-PHY.
124 - description: MUX used to switch between oscclk and pixel_clko,
125 respectively if HDMI-PHY is off and operational.
126 - description: Oscillator clock, used as parent of following *_user
127 clocks in case HDMI-PHY is not operational.
128 - description: Gate of HDMI SPDIF clock.
129 clock-names:
131 - const: hdmi_pclk
132 - const: hdmi_i_pclk
133 - const: i_tmds_clk
134 - const: i_pixel_clk
135 - const: tmds_clko
136 - const: tmds_clko_user
137 - const: pixel_clko
138 - const: pixel_clko_user
139 - const: oscclk
140 - const: i_spdif_clk
142 - samsung,sysreg-phandle
147 - description: Gate of HDMI IP bus clock.
148 - description: Gate of HDMI special clock.
149 - description: Pixel special clock, one of the two possible inputs
150 of HDMI clock mux.
151 - description: HDMI PHY clock output, one of two possible inputs of
152 HDMI clock mux.
153 - description: It is required by the driver to switch between the 2
157 clock-names:
159 - const: hdmi
160 - const: sclk_hdmi
161 - const: sclk_pixel
162 - const: sclk_hdmiphy
163 - const: mout_hdmi
168 - |
169 #include <dt-bindings/clock/exynos5433.h>
170 #include <dt-bindings/gpio/gpio.h>
171 #include <dt-bindings/interrupt-controller/arm-gic.h>
173 hdmi@13970000 {
174 compatible = "samsung,exynos5433-hdmi";
187 clock-names = "hdmi_pclk",
199 samsung,syscon-phandle = <&pmu_system_controller>;
200 samsung,sysreg-phandle = <&syscon_disp>;
201 #sound-dai-cells = <0>;
203 hpd-gpios = <&gpa3 0 GPIO_ACTIVE_HIGH>;
204 vdd-supply = <&ldo6_reg>;
205 vdd_osc-supply = <&ldo7_reg>;
206 vdd_pll-supply = <&ldo6_reg>;
209 #address-cells = <1>;
210 #size-cells = <0>;
215 remote-endpoint = <&tv_to_hdmi>;
222 remote-endpoint = <&mhl_to_hdmi>;