Lines Matching +full:display +full:- +full:timings
6 - compatible: Should be "fsl,imx23-lcdif" for i.MX23.
7 Should be "fsl,imx28-lcdif" for i.MX28.
8 Should be "fsl,imx6sx-lcdif" for i.MX6SX.
9 Should be "fsl,imx8mq-lcdif" for i.MX8MQ.
10 - reg: Address and length of the register set for LCDIF
11 - interrupts: Should contain LCDIF interrupt
12 - clocks: A list of phandle + clock-specifier pairs, one for each
13 entry in 'clock-names'.
14 - clock-names: A list of clock names. For MXSFB it should contain:
15 - "pix" for the LCDIF block clock
16 - (MX6SX-only) "axi", "disp_axi" for the bus interface clock
18 Required sub-nodes:
19 - port: The connection to an encoder chip.
23 lcdif1: display-controller@2220000 {
24 compatible = "fsl,imx6sx-lcdif", "fsl,imx28-lcdif";
30 clock-names = "pix", "axi", "disp_axi";
34 remote-endpoint = <&panel_in_parallel>;
42 - compatible: Should be "fsl,imx23-lcdif" for i.MX23.
43 Should be "fsl,imx28-lcdif" for i.MX28.
44 - reg: Address and length of the register set for LCDIF
45 - interrupts: Should contain LCDIF interrupts
46 - display: phandle to display node (see below for details)
48 * display node
51 - bits-per-pixel: <16> for RGB565, <32> for RGB888/666.
52 - bus-width: number of data lines. Could be <8>, <16>, <18> or <24>.
54 Required sub-node:
55 - display-timings: Refer to binding doc display-timing.txt for details.
60 compatible = "fsl,imx28-lcdif";
64 display: display {
65 bits-per-pixel = <32>;
66 bus-width = <24>;
68 display-timings {
69 native-mode = <&timing0>;
71 clock-frequency = <33500000>;
74 hfront-porch = <164>;
75 hback-porch = <89>;
76 hsync-len = <10>;
77 vback-porch = <23>;
78 vfront-porch = <10>;
79 vsync-len = <10>;
80 hsync-active = <0>;
81 vsync-active = <0>;
82 de-active = <1>;
83 pixelclk-active = <0>;