Lines Matching +full:0 +full:x0aeb0000
39 "^display-controller@[0-9a-f]+$":
47 "^displayport-controller@[0-9a-f]+$":
57 "^dsi@[0-9a-f]+$":
67 "^phy@[0-9a-f]+$":
91 reg = <0x0ae00000 0x1000>;
115 iommus = <&apps_smmu 0x2800 0x402>;
123 reg = <0x0ae01000 0x8f000>,
124 <0x0aeb0000 0x2008>;
147 interrupts = <0>;
151 #size-cells = <0>;
153 port@0 {
154 reg = <0>;
200 reg = <0x0ae94000 0x400>;
221 assigned-clock-parents = <&dsi0_phy 0>, <&dsi0_phy 1>;
230 #size-cells = <0>;
234 #size-cells = <0>;
236 port@0 {
237 reg = <0>;
277 reg = <0x0ae94400 0x200>,
278 <0x0ae94600 0x280>,
279 <0x0ae94900 0x260>;
285 #phy-cells = <0>;
295 reg = <0x0ae96000 0x400>;
316 assigned-clock-parents = <&dsi1_phy 0>, <&dsi1_phy 1>;
325 #size-cells = <0>;
329 #size-cells = <0>;
331 port@0 {
332 reg = <0>;
348 reg = <0x0ae96400 0x200>,
349 <0x0ae96600 0x280>,
350 <0x0ae96900 0x260>;
356 #phy-cells = <0>;