Lines Matching +full:mt8173 +full:- +full:power
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Chun-Kuang Hu <chunkuang.hu@kernel.org>
11 - Philipp Zabel <p.zabel@pengutronix.de>
15 Start Of Frame (SOF) / End Of Frame (EOF) to each sub-modules on the display
27 - mediatek,mt2701-disp-mutex
28 - mediatek,mt2712-disp-mutex
29 - mediatek,mt8167-disp-mutex
30 - mediatek,mt8173-disp-mutex
31 - mediatek,mt8183-disp-mutex
32 - mediatek,mt8186-disp-mutex
33 - mediatek,mt8192-disp-mutex
34 - mediatek,mt8195-disp-mutex
42 power-domains:
44 the power controller specified by phandle. See
45 Documentation/devicetree/bindings/power/power-domain.yaml for details.
49 - description: MUTEX Clock
51 mediatek,gce-events:
55 include/dt-bindings/gce/<chip>-gce.h of each chips.
56 $ref: /schemas/types.yaml#/definitions/uint32-array
59 - compatible
60 - reg
61 - interrupts
62 - power-domains
63 - clocks
68 - |
69 #include <dt-bindings/interrupt-controller/arm-gic.h>
70 #include <dt-bindings/clock/mt8173-clk.h>
71 #include <dt-bindings/power/mt8173-power.h>
72 #include <dt-bindings/gce/mt8173-gce.h>
75 #address-cells = <2>;
76 #size-cells = <2>;
79 compatible = "mediatek,mt8173-disp-mutex";
82 power-domains = <&spm MT8173_POWER_DOMAIN_MM>;
84 mediatek,gce-events = <CMDQ_EVENT_MUTEX0_STREAM_EOF>,