Lines Matching +full:meson +full:- +full:gxbb +full:- +full:vpu
1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/display/amlogic,meson-dw-hdmi.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Neil Armstrong <neil.armstrong@linaro.org>
14 - $ref: /schemas/sound/dai-common.yaml#
17 The Amlogic Meson Synopsys Designware Integration is composed of
18 - A Synopsys DesignWare HDMI Controller IP
19 - A TOP control block controlling the Clocks and PHY
20 - A custom HDMI PHY in order to convert video to TMDS signal
36 Pixel data arrives in "4:4:4" format from the VENC block and the VPU HDMI mux
43 Amlogic Meson GXBB, GXL and GXM SoCs families embeds the Synopsys DesignWare
50 - items:
51 - enum:
52 - amlogic,meson-gxbb-dw-hdmi # GXBB (S905)
53 - amlogic,meson-gxl-dw-hdmi # GXL (S905X, S905D)
54 - amlogic,meson-gxm-dw-hdmi # GXM (S912)
55 - const: amlogic,meson-gx-dw-hdmi
56 - enum:
57 - amlogic,meson-g12a-dw-hdmi # G12A (S905X2, S905Y2, S905D2)
68 clock-names:
70 - const: isfr
71 - const: iahb
72 - const: venci
77 reset-names:
79 - const: hdmitx_apb
80 - const: hdmitx
81 - const: hdmitx_phy
83 hdmi-supply:
96 "#address-cells":
99 "#size-cells":
102 "#sound-dai-cells":
105 sound-name-prefix: true
108 - compatible
109 - reg
110 - interrupts
111 - clocks
112 - clock-names
113 - resets
114 - reset-names
115 - port@0
116 - port@1
117 - "#address-cells"
118 - "#size-cells"
123 - |
124 hdmi_tx: hdmi-tx@c883a000 {
125 compatible = "amlogic,meson-gxbb-dw-hdmi", "amlogic,meson-gx-dw-hdmi";
129 reset-names = "hdmitx_apb", "hdmitx", "hdmitx_phy";
131 clock-names = "isfr", "iahb", "venci";
132 #address-cells = <1>;
133 #size-cells = <0>;
135 /* VPU VENC Input */
140 remote-endpoint = <&hdmi_tx_out>;
149 remote-endpoint = <&hdmi_connector_in>;