Lines Matching +full:0 +full:- +full:pwrkey
3 Copyright (C) 2008-2011 Freescale Semiconductor Inc.
6 -Overview
7 -SEC 4 Node
8 -Job Ring Node
9 -Run Time Integrity Check (RTIC) Node
10 -Run Time Integrity Check (RTIC) Memory Node
11 -Secure Non-Volatile Storage (SNVS) Node
12 -Secure Non-Volatile Storage (SNVS) Low Power (LP) RTC Node
13 -Full Example
29 HW interface between QM & SEC 4 and also BM & SEC 4, on DPAA-enabled parts
54 - compatible
57 Definition: Must include "fsl,sec-v4.0"
59 - fsl,sec-era
65 - #address-cells
71 - #size-cells
78 - reg
80 Value type: <prop-encoded-array>
85 - ranges
87 Value type: <prop-encoded-array>
89 range of the SEC 4.0 register space (-SNVS not included). A
93 - interrupts
95 Value type: <prop_encoded-array>
102 - clocks
104 Value type: <prop_encoded-array>
108 - clock-names
123 compatible = "fsl,sec-v4.0";
124 fsl,sec-era = <2>;
125 #address-cells = <1>;
126 #size-cells = <1>;
127 reg = <0x300000 0x10000>;
128 ranges = <0 0x300000 0x10000>;
129 interrupt-parent = <&mpic>;
135 clock-names = "mem", "aclk", "ipg", "emi_slow";
142 compatible = "fsl,sec-v4.0";
143 #address-cells = <1>;
144 #size-cells = <1>;
145 reg = <0x2140000 0x3c000>;
146 ranges = <0 0x2140000 0x3c000>;
152 clock-names = "mem", "aclk", "ipg";
165 - compatible
168 Definition: Must include "fsl,sec-v4.0-job-ring"
170 - reg
172 Value type: <prop-encoded-array>
176 - fsl,liodn
177 Usage: optional-but-recommended
178 Value type: <prop-encoded-array>
181 the ppid-to-liodn table that specifies the PPID to LIODN mapping.
186 - interrupts
188 Value type: <prop_encoded-array>
197 compatible = "fsl,sec-v4.0-job-ring";
198 reg = <0x1000 0x1000>;
199 fsl,liodn = <0x081>;
200 interrupt-parent = <&mpic>;
216 - compatible
219 Definition: Must include "fsl,sec-v4.0-rtic".
221 - #address-cells
228 - #size-cells
235 - reg
237 Value type: <prop-encoded-array>
242 - ranges
244 Value type: <prop-encoded-array>
246 range of the SEC 4 register space (-SNVS not included). A
252 compatible = "fsl,sec-v4.0-rtic";
253 #address-cells = <1>;
254 #size-cells = <1>;
255 reg = <0x6000 0x100>;
256 ranges = <0x0 0x6100 0xe00>;
262 perform run-time integrity check of memory areas that should not modified.
267 - compatible
270 Definition: Must include "fsl,sec-v4.0-rtic-memory".
272 - reg
274 Value type: <prop-encoded-array>
281 - fsl,rtic-region
282 Usage: optional-but-recommended
283 Value type: <prop-encoded-array>
290 - fsl,liodn
291 Usage: optional-but-recommended
292 Value type: <prop-encoded-array>
295 the ppid-to-liodn table that specifies the PPID to LIODN
301 rtic-a@0 {
302 compatible = "fsl,sec-v4.0-rtic-memory";
303 reg = <0x00 0x20 0x100 0x80>;
304 fsl,liodn = <0x03c>;
305 fsl,rtic-region = <0x12345678 0x12345678 0x12345678>;
309 Secure Non-Volatile Storage (SNVS) Node
317 - compatible
320 Definition: Must include "fsl,sec-v4.0-mon" and "syscon".
322 - reg
324 Value type: <prop-encoded-array>
329 - #address-cells
336 - #size-cells
343 - ranges
345 Value type: <prop-encoded-array>
350 - interrupts
352 Value type: <prop_encoded-array>
361 compatible = "fsl,sec-v4.0-mon", "syscon";
362 reg = <0x314000 0x1000>;
363 ranges = <0 0x314000 0x1000>;
364 interrupt-parent = <&mpic>;
369 Secure Non-Volatile Storage (SNVS) Low Power (LP) RTC Node
373 - compatible
376 Definition: Must include "fsl,sec-v4.0-mon-rtc-lp".
378 - interrupts
380 Value type: <prop_encoded-array>
387 - regmap
392 - offset
395 Definition: LP register offset. default it is 0x34.
397 - clocks
400 Value type: <prop_encoded-array>
404 - clock-names
408 Definition: clock name string should be "snvs-rtc".
412 compatible = "fsl,sec-v4.0-mon-rtc-lp";
415 offset = <0x34>;
417 clock-names = "snvs-rtc";
423 The snvs-pwrkey is designed to enable POWER key function which controlled
427 - compatible:
430 Definition: Mush include "fsl,sec-v4.0-pwrkey".
432 - interrupts:
434 Value type: <prop_encoded-array>
437 - linux,keycode:
442 - wakeup-source:
445 Definition: Button can wake-up the system.
447 - regmap:
453 snvs-pwrkey@020cc000 {
454 compatible = "fsl,sec-v4.0-pwrkey";
456 interrupts = <0 4 0x4>
458 wakeup-source;
465 compatible = "fsl,sec-v4.0";
466 #address-cells = <1>;
467 #size-cells = <1>;
468 reg = <0x300000 0x10000>;
469 ranges = <0 0x300000 0x10000>;
470 interrupt-parent = <&mpic>;
474 compatible = "fsl,sec-v4.0-job-ring";
475 reg = <0x1000 0x1000>;
476 interrupt-parent = <&mpic>;
481 compatible = "fsl,sec-v4.0-job-ring";
482 reg = <0x2000 0x1000>;
483 interrupt-parent = <&mpic>;
488 compatible = "fsl,sec-v4.0-job-ring";
489 reg = <0x3000 0x1000>;
490 interrupt-parent = <&mpic>;
495 compatible = "fsl,sec-v4.0-job-ring";
496 reg = <0x4000 0x1000>;
497 interrupt-parent = <&mpic>;
502 compatible = "fsl,sec-v4.0-rtic";
503 #address-cells = <1>;
504 #size-cells = <1>;
505 reg = <0x6000 0x100>;
506 ranges = <0x0 0x6100 0xe00>;
508 rtic_a: rtic-a@0 {
509 compatible = "fsl,sec-v4.0-rtic-memory";
510 reg = <0x00 0x20 0x100 0x80>;
513 rtic_b: rtic-b@20 {
514 compatible = "fsl,sec-v4.0-rtic-memory";
515 reg = <0x20 0x20 0x200 0x80>;
518 rtic_c: rtic-c@40 {
519 compatible = "fsl,sec-v4.0-rtic-memory";
520 reg = <0x40 0x20 0x300 0x80>;
523 rtic_d: rtic-d@60 {
524 compatible = "fsl,sec-v4.0-rtic-memory";
525 reg = <0x60 0x20 0x500 0x80>;
531 compatible = "fsl,sec-v4.0-mon";
532 reg = <0x314000 0x1000>;
533 ranges = <0 0x314000 0x1000>;
536 compatible = "fsl,sec-v4.0-mon-rtc-lp";
538 offset = <0x34>;
541 clock-names = "snvs-rtc";
544 snvs-pwrkey@020cc000 {
545 compatible = "fsl,sec-v4.0-pwrkey";
547 interrupts = <0 4 0x4>;
549 wakeup-source;