Lines Matching +full:4 +full:- +full:ring

1 # SPDX-License-Identifier: GPL-2.0
2 # Copyright (C) 2008-2011 Freescale Semiconductor Inc.
4 ---
5 $id: http://devicetree.org/schemas/crypto/fsl,sec-v4.0.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 title: Freescale SEC 4
11 - '"Horia Geantă" <horia.geanta@nxp.com>'
12 - Pankaj Gupta <pankaj.gupta@nxp.com>
13 - Gaurav Jain <gaurav.jain@nxp.com>
16 NOTE: the SEC 4 is also known as Freescale's Cryptographic Accelerator
19 SEC 4 h/w can process requests from 2 types of sources.
20 1. DPAA Queue Interface (HW interface between Queue Manager & SEC 4).
21 2. Job Rings (HW interface between cores & SEC 4 registers).
25 HW interface between QM & SEC 4 and also BM & SEC 4, on DPAA-enabled parts
31 Job Ring Data Path Configuration:
33 Each JR is located on a separate 4k page, they may (or may not) be made visible
34 in the memory partition devoted to a particular core. The P4080 has 4 JRs, so
35 up to 4 JRs can be configured; and all 4 JRs process requests in parallel.
40 - items:
41 - const: fsl,sec-v5.4
42 - const: fsl,sec-v5.0
43 - const: fsl,sec-v4.0
44 - items:
45 - enum:
46 - fsl,imx6ul-caam
47 - fsl,sec-v5.0
48 - const: fsl,sec-v4.0
49 - const: fsl,sec-v4.0
57 '#address-cells':
60 '#size-cells':
65 maxItems: 4
67 clock-names:
69 maxItems: 4
73 dma-coherent: true
78 fsl,sec-era:
83 '^jr@[0-9a-f]+$':
87 Job Ring (JR) Node. Defines data processing interface to SEC 4 across the
96 - items:
97 - const: fsl,sec-v5.4-job-ring
98 - const: fsl,sec-v5.0-job-ring
99 - const: fsl,sec-v4.0-job-ring
100 - items:
101 - const: fsl,sec-v5.0-job-ring
102 - const: fsl,sec-v4.0-job-ring
103 - const: fsl,sec-v4.0-job-ring
113 Specifies the LIODN to be used in conjunction with the ppid-to-liodn
120 '^rtic@[0-9a-f]+$':
133 - items:
134 - const: fsl,sec-v5.4-rtic
135 - const: fsl,sec-v5.0-rtic
136 - const: fsl,sec-v4.0-rtic
137 - const: fsl,sec-v4.0-rtic
148 '#address-cells':
151 '#size-cells':
155 '^rtic-[a-z]@[0-9a-f]+$':
160 memory regions that are used to perform run-time integrity check of
168 - items:
169 - const: fsl,sec-v5.4-rtic-memory
170 - const: fsl,sec-v5.0-rtic-memory
171 - const: fsl,sec-v4.0-rtic-memory
172 - const: fsl,sec-v4.0-rtic-memory
176 - description: RTIC memory address
177 - description: RTIC hash result
182 ppid-to-liodn table that specifies the PPID to LIODN mapping.
189 fsl,rtic-region:
195 $ref: /schemas/types.yaml#/definitions/uint32-array
198 - compatible
199 - reg
200 - ranges
205 - |
207 compatible = "fsl,sec-v4.0";
208 #address-cells = <1>;
209 #size-cells = <1>;
215 compatible = "fsl,sec-v4.0-job-ring";
221 compatible = "fsl,sec-v4.0-job-ring";
227 compatible = "fsl,sec-v4.0-job-ring";
233 compatible = "fsl,sec-v4.0-job-ring";
239 compatible = "fsl,sec-v4.0-rtic";
240 #address-cells = <1>;
241 #size-cells = <1>;
245 rtic-a@0 {
246 compatible = "fsl,sec-v4.0-rtic-memory";
250 rtic-b@20 {
251 compatible = "fsl,sec-v4.0-rtic-memory";
255 rtic-c@40 {
256 compatible = "fsl,sec-v4.0-rtic-memory";
260 rtic-d@60 {
261 compatible = "fsl,sec-v4.0-rtic-memory";