Lines Matching +full:psci +full:- +full:0

8 - compatible
11 	Definition:	must be "qcom,cpufreq-hw" or "qcom,cpufreq-epss".
13 - clocks
18 - clock-names
23 - reg
25 	Value type:	<prop-encoded-array>
28 - reg-names
32 			"freq-domain0", "freq-domain1".
34 - #freq-domain-cells:
38 * Property qcom,freq-domain
39 Devices supporting freq-domain must set their "qcom,freq-domain" property with
40 phandle to a cpufreq_hw followed by the Domain ID(0/1) in the CPU DT node.
45 Example 1: Dual-cluster, Quad-core per cluster. CPUs within a cluster switch
50 		#address-cells = <2>;
51 		#size-cells = <0>;
53 		CPU0: cpu@0 {
56 			reg = <0x0 0x0>;
57 			enable-method = "psci";
58 			next-level-cache = <&L2_0>;
59 			qcom,freq-domain = <&cpufreq_hw 0>;
60 			L2_0: l2-cache {
62 				next-level-cache = <&L3_0>;
63 				L3_0: l3-cache {
72 			reg = <0x0 0x100>;
73 			enable-method = "psci";
74 			next-level-cache = <&L2_100>;
75 			qcom,freq-domain = <&cpufreq_hw 0>;
76 			L2_100: l2-cache {
78 				next-level-cache = <&L3_0>;
85 			reg = <0x0 0x200>;
86 			enable-method = "psci";
87 			next-level-cache = <&L2_200>;
88 			qcom,freq-domain = <&cpufreq_hw 0>;
89 			L2_200: l2-cache {
91 				next-level-cache = <&L3_0>;
98 			reg = <0x0 0x300>;
99 			enable-method = "psci";
100 			next-level-cache = <&L2_300>;
101 			qcom,freq-domain = <&cpufreq_hw 0>;
102 			L2_300: l2-cache {
104 				next-level-cache = <&L3_0>;
111 			reg = <0x0 0x400>;
112 			enable-method = "psci";
113 			next-level-cache = <&L2_400>;
114 			qcom,freq-domain = <&cpufreq_hw 1>;
115 			L2_400: l2-cache {
117 				next-level-cache = <&L3_0>;
124 			reg = <0x0 0x500>;
125 			enable-method = "psci";
126 			next-level-cache = <&L2_500>;
127 			qcom,freq-domain = <&cpufreq_hw 1>;
128 			L2_500: l2-cache {
130 				next-level-cache = <&L3_0>;
137 			reg = <0x0 0x600>;
138 			enable-method = "psci";
139 			next-level-cache = <&L2_600>;
140 			qcom,freq-domain = <&cpufreq_hw 1>;
141 			L2_600: l2-cache {
143 				next-level-cache = <&L3_0>;
150 			reg = <0x0 0x700>;
151 			enable-method = "psci";
152 			next-level-cache = <&L2_700>;
153 			qcom,freq-domain = <&cpufreq_hw 1>;
154 			L2_700: l2-cache {
156 				next-level-cache = <&L3_0>;
163 		compatible = "qcom,cpufreq-hw";
164 		reg = <0x17d43000 0x1400>, <0x17d45800 0x1400>;
165 		reg-names = "freq-domain0", "freq-domain1";
168 		clock-names = "xo", "alternate";
170 		#freq-domain-cells = <1>;