Lines Matching +full:sc9860 +full:- +full:pmu +full:- +full:gate
1 Spreadtrum SC9860 Clock Binding
2 ------------------------
5 - compatible: should contain the following compatible strings:
6 - "sprd,sc9860-pmu-gate"
7 - "sprd,sc9860-pll"
8 - "sprd,sc9860-ap-clk"
9 - "sprd,sc9860-aon-prediv"
10 - "sprd,sc9860-apahb-gate"
11 - "sprd,sc9860-aon-gate"
12 - "sprd,sc9860-aonsecure-clk"
13 - "sprd,sc9860-agcp-gate"
14 - "sprd,sc9860-gpu-clk"
15 - "sprd,sc9860-vsp-clk"
16 - "sprd,sc9860-vsp-gate"
17 - "sprd,sc9860-cam-clk"
18 - "sprd,sc9860-cam-gate"
19 - "sprd,sc9860-disp-clk"
20 - "sprd,sc9860-disp-gate"
21 - "sprd,sc9860-apapb-gate"
23 - #clock-cells: must be 1
25 - clocks : Should be the input parent clock(s) phandle for the clock, this
34 - reg: Contain the registers base address and length. It must be configured
37 - sprd,syscon: phandle to the syscon which is in the same address area with
43 pmu_gate: pmu-gate {
44 compatible = "sprd,sc9860-pmu-gate";
47 #clock-cells = <1>;
51 compatible = "sprd,sc9860-pll";
54 #clock-cells = <1>;
57 ap_clk: clock-controller@20000000 {
58 compatible = "sprd,sc9860-ap-clk";
62 #clock-cells = <1>;