Lines Matching +full:pll +full:-

1 Binding for the HSDK Generic PLL clock
5 [1] Documentation/devicetree/bindings/clock/clock-bindings.txt
8 - compatible: should be "snps,hsdk-<name>-pll-clock"
9   "snps,hsdk-core-pll-clock"
10   "snps,hsdk-gp-pll-clock"
11   "snps,hsdk-hdmi-pll-clock"
12 - reg : should contain base register location and length.
13 - clocks: shall be the input parent clock phandle for the PLL.
14 - #clock-cells: from common clock binding; Should always be set to 0.
17 	input_clk: input-clk {
18 		clock-frequency = <33333333>;
19 		compatible = "fixed-clock";
20 		#clock-cells = <0>;
23 	cpu_clk: cpu-clk@0 {
24 		compatible = "snps,hsdk-core-pll-clock";
26 		#clock-cells = <0>;