Lines Matching +full:exynos +full:- +full:bus
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/clock/samsung,exynosautov9-clock.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Samsung Exynos Auto v9 SoC clock controller
10 - Chanho Park <chanho61.park@samsung.com>
11 - Chanwoo Choi <cw00.choi@samsung.com>
12 - Krzysztof Kozlowski <krzk@kernel.org>
13 - Sylwester Nawrocki <s.nawrocki@samsung.com>
14 - Tomasz Figa <tomasz.figa@gmail.com>
17 Exynos Auto v9 clock controller is comprised of several CMU units, generating
21 The external OSCCLK must be defined as fixed-rate clock in dts.
23 CMU_TOP is a top-level CMU, where all base clocks are prepared using PLLs and
30 'include/dt-bindings/clock/samsung,exynosautov9.h' header.
35 - samsung,exynosautov9-cmu-top
36 - samsung,exynosautov9-cmu-busmc
37 - samsung,exynosautov9-cmu-core
38 - samsung,exynosautov9-cmu-fsys0
39 - samsung,exynosautov9-cmu-fsys1
40 - samsung,exynosautov9-cmu-fsys2
41 - samsung,exynosautov9-cmu-peric0
42 - samsung,exynosautov9-cmu-peric1
43 - samsung,exynosautov9-cmu-peris
49 clock-names:
53 "#clock-cells":
60 - if:
64 const: samsung,exynosautov9-cmu-top
70 - description: External reference clock (26 MHz)
72 clock-names:
74 - const: oscclk
76 - if:
80 const: samsung,exynosautov9-cmu-busmc
86 - description: External reference clock (26 MHz)
87 - description: CMU_BUSMC bus clock (from CMU_TOP)
89 clock-names:
91 - const: oscclk
92 - const: dout_clkcmu_busmc_bus
94 - if:
98 const: samsung,exynosautov9-cmu-core
104 - description: External reference clock (26 MHz)
105 - description: CMU_CORE bus clock (from CMU_TOP)
107 clock-names:
109 - const: oscclk
110 - const: dout_clkcmu_core_bus
112 - if:
116 const: samsung,exynosautov9-cmu-fsys0
122 - description: External reference clock (26 MHz)
123 - description: CMU_FSYS0 bus clock (from CMU_TOP)
124 - description: CMU_FSYS0 pcie clock (from CMU_TOP)
126 clock-names:
128 - const: oscclk
129 - const: dout_clkcmu_fsys0_bus
130 - const: dout_clkcmu_fsys0_pcie
132 - if:
136 const: samsung,exynosautov9-cmu-fsys1
142 - description: External reference clock (26 MHz)
143 - description: CMU_FSYS1 bus clock (from CMU_TOP)
144 - description: CMU_FSYS1 mmc card clock (from CMU_TOP)
145 - description: CMU_FSYS1 usb clock (from CMU_TOP)
147 clock-names:
149 - const: oscclk
150 - const: dout_clkcmu_fsys1_bus
151 - const: gout_clkcmu_fsys1_mmc_card
152 - const: dout_clkcmu_fsys1_usbdrd
154 - if:
158 const: samsung,exynosautov9-cmu-fsys2
164 - description: External reference clock (26 MHz)
165 - description: CMU_FSYS2 bus clock (from CMU_TOP)
166 - description: UFS clock (from CMU_TOP)
167 - description: Ethernet clock (from CMU_TOP)
169 clock-names:
171 - const: oscclk
172 - const: dout_clkcmu_fsys2_bus
173 - const: dout_fsys2_clkcmu_ufs_embd
174 - const: dout_fsys2_clkcmu_ethernet
176 - if:
180 const: samsung,exynosautov9-cmu-peric0
186 - description: External reference clock (26 MHz)
187 - description: CMU_PERIC0 bus clock (from CMU_TOP)
188 - description: PERIC0 IP clock (from CMU_TOP)
190 clock-names:
192 - const: oscclk
193 - const: dout_clkcmu_peric0_bus
194 - const: dout_clkcmu_peric0_ip
196 - if:
200 const: samsung,exynosautov9-cmu-peric1
206 - description: External reference clock (26 MHz)
207 - description: CMU_PERIC1 bus clock (from CMU_TOP)
208 - description: PERIC1 IP clock (from CMU_TOP)
210 clock-names:
212 - const: oscclk
213 - const: dout_clkcmu_peric1_bus
214 - const: dout_clkcmu_peric1_ip
216 - if:
220 const: samsung,exynosautov9-cmu-peris
226 - description: External reference clock (26 MHz)
227 - description: CMU_PERIS bus clock (from CMU_TOP)
229 clock-names:
231 - const: oscclk
232 - const: dout_clkcmu_peris_bus
235 - compatible
236 - "#clock-cells"
237 - clocks
238 - clock-names
239 - reg
245 - |
246 #include <dt-bindings/clock/samsung,exynosautov9.h>
248 cmu_fsys2: clock-controller@17c00000 {
249 compatible = "samsung,exynosautov9-cmu-fsys2";
251 #clock-cells = <1>;
257 clock-names = "oscclk",