Lines Matching +full:rk3368 +full:- +full:cru

1 * Rockchip RK3368 Clock and Reset Unit
3 The RK3368 clock controller generates and supplies clock to various
9 - compatible: should be "rockchip,rk3368-cru"
10 - reg: physical base address of the controller and length of memory mapped
12 - #clock-cells: should be 1.
13 - #reset-cells: should be 1.
17 - rockchip,grf: phandle to the syscon managing the "general register files"
22 preprocessor macros in the dt-bindings/clock/rk3368-cru.h headers and can be
30 clock-output-names:
31  - "xin24m" - crystal input - required,
32  - "xin32k" - rtc clock - optional,
33  - "ext_i2s" - external I2S clock - optional,
34  - "ext_gmac" - external GMAC clock - optional
35  - "ext_hsadc" - external HSADC clock - optional,
36  - "ext_isp" - external ISP clock - optional,
37  - "ext_jtag" - external JTAG clock - optional
38  - "ext_vip" - external VIP clock - optional,
39  - "usbotg_out" - output clock of the pll in the otg phy
43 	cru: clock-controller@ff760000 {
44 		compatible = "rockchip,rk3368-cru";
47 		#clock-cells = <1>;
48 		#reset-cells = <1>;
55 		compatible = "snps,dw-apb-uart";
58 		reg-shift = <2>;
59 		reg-io-width = <1>;
60 		clocks = <&cru SCLK_UART0>;